SN74LVCH32245A中文资料具有三态输出的 32 位总线收发器数据手册TI规格书

描述 Description

This 32-bit (quad-octal) noninverting bus transceiver is designed for 1.65-V to 3.6-V VCC operation.
The SN74LVCH32245A is designed for asynchronous communication between data buses. The control-function implementation minimizes external timing requirements.
This device can be used as four 8-bit transceivers, two 16-bit transceivers, or one 32-bit transceiver. It allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE)\\ input can be used to disable the device so that the buses are effectively isolated.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
To ensure the high-impedance state during power up or power down, OE\\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. The bus-hold circuitry is part of the input circuit and is not disabled by OE\\ or DIR.

特性 Features

• Memeber of the Texas Instruments Widebus+™ Family
• Inputs Accept Voltages to 5.5 V
• Typical VOLP (Output Ground Bounce)    CC = 3.3 V, TA= 25°C
• Ioff Supports Partial-Power-Down Mode Operation
• Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
• 200-V Machine Model (A115-A)
• 1000-V Charged-Device Model (C101)
Widebus+ is a trademark of Texas Instruments.