SN74LVC1G97DCK3集成电路（IC）的门反相器-多功能可配置规格书PDF中文资料

SN74LVC1G97DCK3属于集成电路（IC）的门反相器-多功能可配置。由德州仪器制造生产的SN74LVC1G97DCK3门和反相器 - 多功能，可配置可配置逻辑栅极系列产品能以与标准逻辑栅极类似的方式，对单个逻辑信号执行基本逻辑运算，但并非局限于一个特定功能（例如 AND、NAND 等）。它们通常在内部使用少量逻辑门来实现，经过选择和互连后，以便通过选择操作数据所应用的输入以及任何未使用的输入在驱动后的逻辑状态，来配置所实现的整体逻辑功能。

1 Features

1• ESD Protection Exceeds JESD 22

– 2000-V Human Body Model (A114-A)

– 200-V Machine Model (A115-A)

– 1000-V Charged-Device Model (C101)

• Available in the Texas Instruments

NanoFree™ Package

• Supports 5-V VCC Operation

• Inputs Accept Voltages to 5.5 V

• Supports Down Translation to VCC

• Max tpd of 6.3 ns at 3.3 V

• Low Power Consumption, 10-μA Max ICC

• ±24-mA Output Drive at 3.3 V

• Ioff Supports Live Insertion, Partial-Power-Down

Mode, and Back-Drive Protection

• Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

• Choose From Nine Specific Logic Functions

2 Applications

• Barcode Scanners

• Cable Solutions

• E-Books

• Embedded PCs

• Field Transmitter: Temperature or Pressure

Sensors

• Fingerprint Biometrics

• HVAC: Heating, Ventilating, and Air Conditioning

• Network-Attached Storage (NAS)

• Server Motherboards and PSUs

• Software Defined Radios (SDR)

• TVs: High Definition (HDTV), LCD, and Digital

• Video Communications Systems

• Wireless Data Access Cards, Headsets,

Keyboard, Mouse, and LAN Cards

3 Description

The SN74LVC1G97 device features configurable

multiple functions. The output state is determined by

eight patterns of 3-bit input. The user can choose the

logic functions MUX, AND, OR, NAND, NOR,

inverter, and noninverter. All inputs can be connected

to VCC or GND.

This configurable multiple-function gate is designed

for 1.65-V to 5.5-V VCC operation.

This device functions as an independent gate, but

because of Schmitt action, it may have different input

threshold levels for positive-going (VT+) and negativegoing

(VT–) signals.

NanoFree package technology is a major breakthrough

in IC packaging concepts, using the die as

the package.

This device is fully specified for partial-power-down

applications using Ioff. The Ioff circuitry disables the

outputs, preventing damaging current backflow

through the device when it is powered down.