Single 3-Input Positive-OR Gate

1FEATURES 2• Available in the Texas Instruments NanoStar™ and NanoFree™ Packages • Supports 5-V V CC Operation • Inputs Accept Voltages to 5.5 V • Supports Down Translation to V CC • Max tpd of 4.5 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff Su

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TI

德州仪器

SINGLE 3-INPUT POSITIVE-OR GATE

Features » Operate from 1.65V to 5.5V « Inputs Accept Voltages to 5.5V o loFF supports partial-power-down mode « Low static power consumption; ICC=10pA (Max.) » ESD Protection Exceeds JESD 22 -2000-V Human-Body Model (A114-A) -200-V Machine Model (A115-A) -1000-V Charged-Device Model (C101

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TECHPUBLIC

台舟电子

SINGLE 3-INPUT POSITIVE-OR GATE

 DESCRIPTION The U74LVC1G332 device performs the Boolean function in Y=A+B+C or Y=A B C   positive logic. This device is fully specified for partial-power-down applications using IOFF. The IOFF circuitry disables the outputs, preventing damaging current backflow through the device when it

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UTC

友顺

Single 3-input OR gate

文件：82.27 Kbytes 页数：15 Pages

PHI

飞利浦

Single 3-input OR gate

1. General description The 74LVC1G332 is a single 3-input OR gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower i

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NEXPERIA

安世