SN74LVC1G175DCK集成电路（IC）的触发器规格书PDF中文资料

SN74LVC1G175DCK属于集成电路（IC）的触发器。由德州仪器制造生产的SN74LVC1G175DCK触发器触发器是能够存储单个逻辑状态或信息“位”的基本数字存储器件。这些器件至少有两个输入；一个或多个用于传递要存储的数据，另一个用于指示存储该数据的时间点。不同的触发器类型，例如 D（延迟）、SR（置位复位）和 JK，对提供给其输入的信号有不同的响应，可用于实现不同的逻辑功能。这些器件与锁存器的不同之处在于它们是边缘敏感器件，其保持的逻辑状态仅在接收到有效时钟信号时才会改变。

1 Features

1• Available in the Texas Instruments

NanoFree™ Package

• Supports 5-V VCC Operation

• Inputs Accept Voltages to 5.5 V

• Supports Down Translation to VCC

• Max tpd of 4.3 ns at 3.3 V

• Low Power Consumption, 10-μA Max ICC

• ±24-mA Output Drive at 3.3 V

• Ioff Supports Live Insertion, Partial-Power-Down

Mode, and Back-Drive Protection

• Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

• ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

– 1000-V Charged-Device Model (C101)

2 Applications

• TV/Set Top Box/Audio

• EPOS (Electronic Point-of-Sale)

• Motor Drives

• PC/Notebook

• Servers

• Factory Automation and Control

• Tablets

• Medical Healthcare and Fitness

• Smart Grid

• Telecom Infrastructure

• Enterprise Switching

• Projectors

• Storage

3 Description

This single D-type flip-flop is designed for 1.65-V to

5.5-V VCC operation.

The SN74LVC1G175 device has an asynchronous

clear (CLR) input. When CLR is high, data from the input pin (D) is transferred to the output pin (Q) on

the clock's (CLK) rising edge. When CLR is low, Q is

forced into the low state, regardless of the clock edge

or data on D.

NanoFree™ package technology is a major

breakthrough in IC packaging concepts, using the die

as the package.

This device is fully specified for partial-power-down

applications using Ioff. The Ioff circuitry disables the

outputs, preventing damaging current backflow through the device when it is powered down.