SN74LVC1G00 Single 2-Input Positive-NAND Gate

1 Features 1• Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max t pd of 3.8 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff S

文件：2.25185 Mbytes 页数：44 Pages

TI

德州仪器

Low input current: typical value 0.1uA ● Wide operating voltage range: 1.65V to 5.5V

Features ● Low input current: typical value 0.1uA ● Wide operating voltage range: 1.65V to 5.5V ● Low static power consumption: typical value 0.1uA ● Package form: DBV/DCK/DRL/YZP/ DRY/DSF/ DPW ● High output driver: VCC=4.5V, greater than 32MA

文件：2.14487 Mbytes 页数：10 Pages

UMW

友台半导体

SINGLE 2-INPUT POSITIVE-NAND GATE

文件：443.54 Kbytes 页数：17 Pages

TI

德州仪器

SINGLE 2-INPUT POSITIVE-NAND GATE

文件：668.03 Kbytes 页数：16 Pages

TI

德州仪器

SINGLE 2-INPUT POSITIVE-NAND GATE

文件：667.47 Kbytes 页数：16 Pages

TI

德州仪器

单路 1 输入、1.65V 至 5.5V 与非门

This single 2-input positive-NAND gate is designed for 1.65-V to 5.5-V VCC operation.The SN74LVC1G00 performs the Boolean functionY = A × B or Y = A + B in positive logic.The CMOS device has high output drive while maintaining low static power dissipation over a broad VCC operating range.The SN74LVC • Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch\n• Inputs Accept Voltages to 5.5 V\n• Max tpd of 3.8 ns at 3.3 V\n• ±24-mA Output Drive at 3.3 V\n• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II\n• 2000-V Human-Body Model (A114-A)\n• 1000-V Charged-Device Model (C;

TI

德州仪器

Low input current: typical value 0.1uA ● Wide operating voltage range: 1.65V to 5.5V

Features ● Low input current: typical value 0.1uA ● Wide operating voltage range: 1.65V to 5.5V ● Low static power consumption: typical value 0.1uA ● Package form: DBV/DCK/DRL/YZP/ DRY/DSF/ DPW ● High output driver: VCC=4.5V, greater than 32MA

文件：2.14487 Mbytes 页数：10 Pages

UMW

友台半导体

丝印：C005；Package：SOT-23(DBV)；SN74LVC1G00 Single 2-Input Positive-NAND Gate

1 Features 1• Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max t pd of 3.8 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff S

文件：2.25185 Mbytes 页数：44 Pages

TI

德州仪器

丝印：C005；Package：SOT-23(DBV)；SN74LVC1G00 Single 2-Input Positive-NAND Gate

1 Features 1• Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max t pd of 3.8 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff S

文件：2.25185 Mbytes 页数：44 Pages

TI

德州仪器

丝印：C005；Package：SOT-23(DBV)；SN74LVC1G00 Single 2-Input Positive-NAND Gate

1 Features 1• Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max t pd of 3.8 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff S

文件：2.25185 Mbytes 页数：44 Pages

TI

德州仪器