SN74LVC138A-EP中文资料增强型产品 3 线至 8 线解码器/多路信号分离器数据手册TI规格书

描述 Description

The SN74LVC138A 3-line to 8-line decoder/demultiplexer is designed for 2.7-V to 3.6-V VCC operation. The device is designed for high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, this decoder minimizes the effects of system decoding. When employed with high-speed memories utilizing a fast enable circuit, delay times of this decoder and the enable time of the memory usually are less than the typical access time of the memory. This means that the effective system delay introduced by the decoder is negligible. The conditions at the binary-select inputs and the three enable inputs select one of eight output lines. Two active-low enable inputs and one active-high enable input reduce the need for external gates or inverters when expanding. A 24-line decoder can be implemented without external inverters, and a 32-line decoder requires only one inverter. An enable input can be used as a data input for demultiplexing applications. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V/5-V system environment.

特性 Features

• ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
• Inputs Accept Voltages to 5.5 V
• Typical VOLP (Output Ground Bounce) CC = 3.3 V, TA = 25°C
• SUPPORTS DEFENSE, AEROSPACE, AND MEDICAL APPLICATIONS
• One Assembly/Test Site
• Available in Military (–55°C/125°C) Temperature Range
• Extended Product-Change Notification
• Product Traceability


Custom temperature ranges available