SN74LVC126A-Q1中文资料德州仪器数据手册PDF规格书

1 Features

• Operates from 1.65V to 3.6V

• Specified from –40°C to +125°C

• Inputs accept voltages up to 5.5V

• Maximum tpd of 4.7ns at 3.3V

• Typical VOLP (output ground bounce),

<0.8V at VCC = 3.3V, TA = 25°C

• Typical VOHV (output VOH undershoot),

>2V at VCC = 3.3V, TA = 25°C

• Latch-up performance exceeds 250mA

per JESD 17

2 Applications

• AV Receivers

• Audio Docks: Portable

• Blu-ray Players and Home Theaters

• MP3 Players or Recorders

• Personal Digital Assistants (PDAs)

• Power: Telecom, Server, and AC-DC Supplies

(Single-Controller, Analog, and Digital)

• Solid State Drives (SSDs): Client and Enterprise

• TVs: LCD, Digital, and High-Definition (HDTV)

• Tablets: Enterprise

• Video Analytics: Server

• Wireless Headsets, Keyboards, and Mice

3 Description

The SN74LVC126A device is a quadruple bus buffer

gate designed for 1.65V to 3.6V VCC operation.

The SN74LVC126A device features independent line

drivers with 3-state outputs. Each output is disabled

when the associated output-enable (OE) input is low.

To ensure the high-impedance state during power up

or power down, OE must be tied to GND through a

pulldown resistor; the minimum value of the resistor

is determined by the current-sourcing capability of the

driver.

Inputs can be driven from either 3.3V or 5V

devices. This feature allows the use of this device

as a translator in a mixed 3.3V and 5V system

environment.