SN74LVC125A中文资料具有三态输出的 4 通道、1.65V 至 3.6V 缓冲器数据手册TI规格书

描述 Description

This quadruple bus buffer gate is designed for 1.65-V to 3.6-V VCC operation.The SN74LVC125A device features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is high.To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V/5-V system environment.

特性 Features

• 3-State Outputs
• Operates From 1.65 V to 3.6 V
• Inputs Accept Voltages to 5.5 V
• Typical VOLP (Output Ground Bounce) CC = 3.3 V, TA = 25°C
• Latch-Up Performance Exceeds 250 mA Per JESD 17
• 2000-V Human-Body Model
• 1000-V Charged-Device Model
• APPLICATIONS
• IP Phones: Wired and Wireless
• Optical Networking:
• Point-to-Point Microwave Backhaul
• Analog or Digital
• Private Branch Exchanges (PBX)
• Telecom Base Band Units
• Filter Units
• Power Monitoring Units (PMU)
• Remote Electrical Tilt Units (RET)
• Tower Mounted Amplifiers (TMA)
• Vector Signal Analyzers and Generators
• WiMAX and Wireless Infrastructure Equipment
• xDSL Modems and DSLAM

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