SN74LV6T17-Q1中文资料德州仪器数据手册PDF规格书

1 Features

• Wide operating range of 1.8 V to 5.5 V

• Single-supply voltage translator (refer to LVxT

Enhanced Input Voltage):

– Up translation:

• 1.2 V to 1.8 V

• 1.5 V to 2.5 V

• 1.8 V to 3.3 V

• 3.3 V to 5.0 V

– Down translation:

• 5.0 V, 3.3 V, 2.5 V to 1.8 V

• 5.0 V, 3.3 V to 2.5 V

• 5.0 V to 3.3 V

• 5.5-V tolerant input pins

• Supports standard pinouts

• Up to 150 Mbps with 5-V or 3.3-V VCC

• Latch-up performance exceeds 250 mA per JESD

17

2 Applications

• Enable or disable a digital signal

• Controlling an indicator LED

• Translation between communication modules and

system controllers

3 Description

The SN74LV6T17 device contains six independent

Buffers with Schmitt-trigger inputs. Each gate

performs the Boolean function Y = A in positive

logic. The output level is referenced to the supply

voltage (VCC) and supports 1.8-V, 2.5-V, 3.3-V, and

5-V CMOS levels.

The input is designed with a lower threshold circuit to

support up translation for lower voltage CMOS inputs

(for example, 1.2 V input to 1.8 V output or 1.8 V input

to 3.3 V output). In addition, the 5-V tolerant input pins

enable down translation (for example, 3.3 V to 2.5 V

output).