SN74LV11ATPWREP.A中文资料德州仪器数据手册PDF规格书

Controlled Baseline

− One Assembly/Test Site, One Fabrication

Site

Extended Temperature Performance of

−40°C to 105°C

Enhanced Diminishing Manufacturing

Sources (DMS) Support

Enhanced Product-Change Notification

Qualification Pedigree†

2-V to 5.5-V VCC Operation

Typical VOLP (Output Ground Bounce)

<0.8 V at VCC= 3.3 V, TA = 25°C

Typical VOHV (Output VOH Undershoot)

>2.3 V at VCC = 3.3 V, TA = 25°C

Supports Mixed-Mode Voltage Operation on

All Ports

Ioff Supports Partial-Power-Down Mode

Operation

description/ordering information

This triple 3-input positive-AND gate is designed for 2-V to 5.5-V VCC operation.

The SN74LV11A performs the Boolean function Y
A • B • C or Y
ABC in positive logic.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,

preventing damaging current backflow through the device when it is powered down.