SN74LV08A-Q1数据手册TI中文资料规格书

描述 Description

This quadruple 2-input positive-AND gate is designed for 2-V to 5.5-V VCC operation.

The SN74LV08A performs the Boolean function Y = A • B or Y = (A\\ + B\\) in positive logic.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

特性 Features

• Qualified for Automotive Applications
• Typical VOLP (Output Ground Bounce)    CC = 3.3 V, TA = 25°C
• Typical VOHV (Output VOH Undershoot)    >2 V at VCC = 3.3 V, TA = 25°C
• Supports Mixed-Mode Voltage Operation on All Ports
• Ioff Supports Partial-Power-Down Mode Operation
• Latch-Up Performance Exceeds 250 mA Per JESD 17
• ESD Protection Exceeds JESD 22
• 2000-V Human-Body Model (A114-A)
• 200-V Machine Model (A115-A)
• 1000-V Charged-Device Model (C101)