SN74LS393DR2中文资料安森美半导体数据手册PDF规格书

The SN74LS393 contains a pair of high-speed 4-stage ripple counters.

Each half of the LS393 operates as a Modulo-16 binary divider, with the last three stages triggered in a ripple fashion. In the LS393, the flip-flops are triggered by a HIGH-to-LOW transition of their CP inputs. Each half of each circuit type has a Master Reset input which responds to a HIGH signal by forcing all four outputs to the LOW state.

• Dual Versions

• Individual Asynchronous Clear for Each Counter

• Typical Max Count Frequency of 50 MHz

• Input Clamp Diodes Minimize High Speed Termination Effects