丝印：SN74LS374N；Package：PDIP；OCTAL D-TYPE TRANSPARENT LATCHES AND EDGE-TRIGGERED FLIP-FLOPS

Choice of Eight Latches or Eight D-Type Flip-Flops in a Single Package 3-State Bus-Driving Outputs Full Parallel Access for Loading Buffered Control Inputs Clock-Enable Input Has Hysteresis to Improve Noise Rejection (’S373 and ’S374) P-N-P Inputs Reduce DC Loading on Data Lines (’S373 and

文件：1.58154 Mbytes 页数：32 Pages

TI

德州仪器

丝印：74LS374；Package：SOP；OCTAL D-TYPE TRANSPARENT LATCHES AND EDGE-TRIGGERED FLIP-FLOPS

Choice of Eight Latches or Eight D-Type Flip-Flops in a Single Package 3-State Bus-Driving Outputs Full Parallel Access for Loading Buffered Control Inputs Clock-Enable Input Has Hysteresis to Improve Noise Rejection (’S373 and ’S374) P-N-P Inputs Reduce DC Loading on Data Lines (’S373 and

文件：1.58154 Mbytes 页数：32 Pages

TI

德州仪器

4.BIT BISTABLE LATCHES

Supply Voltage and Ground on Corner Pins To Simplify P-C Board Layout description The SN54LS376 and SN74LS376 bistable latches are electrically and functionally identical to the SN54LS75 and SN74LS75, respectively. Only the arrangement of the terminals hes been changed in the SN54L5375 an

文件：395.7 Kbytes 页数：9 Pages

TI

德州仪器

丝印：LS375；Package：SOIC；4.BIT BISTABLE LATCHES

Supply Voltage and Ground on Corner Pins To Simplify P-C Board Layout description The SN54LS376 and SN74LS376 bistable latches are electrically and functionally identical to the SN54LS75 and SN74LS75, respectively. Only the arrangement of the terminals hes been changed in the SN54L5375 an

文件：395.7 Kbytes 页数：9 Pages

TI

德州仪器

4-BIT D LATCH

The SN54/74LS375 is a 4-Bit D-Type Latch for use as temporary storage for binary information between processing limits and input/output or indicator units. When the Enable (E) is HIGH, information present at the D input will be transferred to the Q output and, if E is HIGH, the Q output will follo

文件：163.97 Kbytes 页数：5 Pages

MOTOROLA

摩托罗拉

丝印：LS375；Package：SOIC；4.BIT BISTABLE LATCHES

Supply Voltage and Ground on Corner Pins To Simplify P-C Board Layout description The SN54LS376 and SN74LS376 bistable latches are electrically and functionally identical to the SN54LS75 and SN74LS75, respectively. Only the arrangement of the terminals hes been changed in the SN54L5375 an

文件：395.7 Kbytes 页数：9 Pages

TI

德州仪器

丝印：SN74LS375N；Package：PDIP；4.BIT BISTABLE LATCHES

Supply Voltage and Ground on Corner Pins To Simplify P-C Board Layout description The SN54LS376 and SN74LS376 bistable latches are electrically and functionally identical to the SN54LS75 and SN74LS75, respectively. Only the arrangement of the terminals hes been changed in the SN54L5375 an

文件：395.7 Kbytes 页数：9 Pages

TI

德州仪器

4-BIT D LATCH

The SN54/74LS375 is a 4-Bit D-Type Latch for use as temporary storage for binary information between processing limits and input/output or indicator units. When the Enable (E) is HIGH, information present at the D input will be transferred to the Q output and, if E is HIGH, the Q output will follo

文件：163.97 Kbytes 页数：5 Pages

MOTOROLA

摩托罗拉

丝印：SN74LS375N；Package：PDIP；4.BIT BISTABLE LATCHES

Supply Voltage and Ground on Corner Pins To Simplify P-C Board Layout description The SN54LS376 and SN74LS376 bistable latches are electrically and functionally identical to the SN54LS75 and SN74LS75, respectively. Only the arrangement of the terminals hes been changed in the SN54L5375 an

文件：395.7 Kbytes 页数：9 Pages

TI

德州仪器

LOW POWER SCHOTTKY

The SN74LS377 is an 8-bit register built using advanced Low Power Schottky technology. This register consists of eight D-type flip-flops with a buffered common clock and a buffered common clock enable. • 8-Bit High Speed Parallel Registers • Positive Edge-Triggered D-Type Flip Flops • F

文件：127.6 Kbytes 页数：8 Pages

ONSEMI

安森美半导体