SN74LS280N.A技术资料参数批发采购德州仪器-114ic电子网

型号	下载订购	功能描述	制造商上传企业	LOGO
SN74LS280N.A	文件：895.28 Kbytes Page：21 Pages	丝印：SN74LS280N；Package：PDIP；9-BIT ODD/EVEN PARITY GENERATORS/CHECKERS Generates Either Odd or Even Parity for Nine Data Lines Cascadable for n-Bits Can Be Used to Upgrade Existing Systems using MSI Parity Circuits Typical Data-to-Output Delay of Only 14 ns for “S280 and 33 ns for ‘LS280 Typical Power Dissipation: ‘LS280. ..80 mW ‘S280. . . 335 mW descrip 文件：895.28 Kbytes 页数：21 Pages	TI 德州仪器	TI
SN74LS280NSR	文件：895.28 Kbytes Page：21 Pages	9-BIT ODD/EVEN PARITY GENERATORS/CHECKERS Generates Either Odd or Even Parity for Nine Data Lines Cascadable for n-Bits Can Be Used to Upgrade Existing Systems using MSI Parity Circuits Typical Data-to-Output Delay of Only 14 ns for “S280 and 33 ns for ‘LS280 Typical Power Dissipation: ‘LS280. ..80 mW ‘S280. . . 335 mW descrip 文件：895.28 Kbytes 页数：21 Pages	TI 德州仪器	TI
SN74LS280NSR	文件：901.09 Kbytes Page：17 Pages	9-BIT ODD/EVEN PARITY GENERATORS/CHECKERS 文件：901.09 Kbytes 页数：17 Pages	TI 德州仪器	TI
SN74LS280NSR	文件：899.48 Kbytes Page：24 Pages	9-BIT ODD/EVEN PARITY GENERATORS/CHECKERS 文件：899.48 Kbytes 页数：24 Pages	TI 德州仪器	TI

更多SN74LS280N.A供应商更新时间2025-12-2 11:00:00