丝印：SN74LS244N；Package：PDIP；SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

文件：1.80265 Mbytes 页数：41 Pages

TI

德州仪器

丝印：SN74LS244N；Package：PDIP；SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

文件：1.80212 Mbytes 页数：41 Pages

TI

德州仪器

具有三态输出的 8 通道、4.75V 至 5.25V 双极缓冲器

The SNx4LS24x, SNx4S24x octal buffers and line drivers are designed specifically to improve both the performance and density of three-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The designer has a choice of selected combinations of inverting and non-inve • Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs\n• Maximum tpd of 15 ns at 5 V\n• 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers\n• PNP Inputs Reduce DC Loading\n• Hysteresis at Inputs Improves Noise Margins;

TI

德州仪器

丝印：LS244；Package：SSOP；SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

文件：1.80265 Mbytes 页数：41 Pages

TI

德州仪器

丝印：LS244；Package：SSOP；SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

文件：1.80212 Mbytes 页数：41 Pages

TI

德州仪器

丝印：LS244；Package：SOIC；SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

文件：1.80212 Mbytes 页数：41 Pages

TI

德州仪器

丝印：LS244；Package：SOIC；SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

文件：1.80265 Mbytes 页数：41 Pages

TI

德州仪器

LOW POWER SCHOTTKY

The SN74LS240 and SN74LS244 are Octal Buffers and Line Drivers designed to be employed as memory address drivers, clock drivers and bus-oriented transmitters/receivers which provide improved PC board density. • Hysteresis at Inputs to Improve Noise Margins • 3-State Outputs Drive Bus Lines

文件：122.25 Kbytes 页数：8 Pages

ONSEMI

安森美半导体

OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS

OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS The SN54/74LS240, 241 and 244 are Octal Buffers and Line Drivers designed to be employed as memory address drivers, clock drivers and bus-oriented transmitters/receivers which provide improved PC board density. • Hysteresis at Inputs to Impro

文件：191.82 Kbytes 页数：6 Pages

Motorola

摩托罗拉

丝印：LS244；Package：SOIC；SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

文件：1.80265 Mbytes 页数：41 Pages

TI

德州仪器