4-STAGE PRESETTABLE RIPPLE COUNTERS

4-STAGE PRESETTABLE RIPPLE COUNTERS The SN54/74LS196 decade counter is partitioned into divide-by-two and divide-by-five sections which can be combined to count either in BCD (8, 4, 2, 1) sequence or in a bi-quinary mode producing a 50 duty cycle output. The SN54/74LS197 contains divide-by-tw

文件：227.03 Kbytes 页数：6 Pages

MOTOROLA

摩托罗拉

4-STAGE PRESETTABLE RIPPLE COUNTERS

4-STAGE PRESETTABLE RIPPLE COUNTERS The SN54/74LS196 decade counter is partitioned into divide-by-two and divide-by-five sections which can be combined to count either in BCD (8, 4, 2, 1) sequence or in a bi-quinary mode producing a 50 duty cycle output. The SN54/74LS197 contains divide-by-tw

文件：227.03 Kbytes 页数：6 Pages

MOTOROLA

摩托罗拉

50/30/100-MHz PRESETTABLE DECADE OR BINARY COUNTERS/LATCHES

Performs BCD, Bi-Quinary, or Binary Counting Fully Programmable Fully independent Clear Input Input Clamping Diodes Simplify System Design Output QA Maintains Full Fan-out Capability In Addition to Driving Clock-2 Input

文件：666.31 Kbytes 页数：14 Pages

TI

德州仪器

4-STAGE PRESETTABLE RIPPLE COUNTERS

4-STAGE PRESETTABLE RIPPLE COUNTERS The SN54/74LS196 decade counter is partitioned into divide-by-two and divide-by-five sections which can be combined to count either in BCD (8, 4, 2, 1) sequence or in a bi-quinary mode producing a 50 duty cycle output. The SN54/74LS197 contains divide-by-tw

文件：227.03 Kbytes 页数：6 Pages

MOTOROLA

摩托罗拉

4-STAGE PRESETTABLE RIPPLE COUNTERS

4-STAGE PRESETTABLE RIPPLE COUNTERS The SN54/74LS196 decade counter is partitioned into divide-by-two and divide-by-five sections which can be combined to count either in BCD (8, 4, 2, 1) sequence or in a bi-quinary mode producing a 50 duty cycle output. The SN54/74LS197 contains divide-by-tw

文件：227.03 Kbytes 页数：6 Pages

MOTOROLA

摩托罗拉

SCHMITT-TRIGGER POSITIVE-NAND GATES AND INVERTERS WITH TOTEM-POLE OUTPUTS

Functionally and Mechanically Identical to ‘L813, ‘LS14. and ‘LS132, Respectively Improved Line-Receiving Characteristics P-N-P Inputs Reduce System Loading Excellent Noise Immunity with Typical Hysteresis of 0.8 V description Each circuit functions as a NAND gate or inverter, but beca

文件：784.18 Kbytes 页数：15 Pages

TI

德州仪器

丝印：LS19A；Package：SOIC；SCHMITT-TRIGGER POSITIVE-NAND GATES AND INVERTERS WITH TOTEM-POLE OUTPUTS

Functionally and Mechanically Identical to ‘L813, ‘LS14. and ‘LS132, Respectively Improved Line-Receiving Characteristics P-N-P Inputs Reduce System Loading Excellent Noise Immunity with Typical Hysteresis of 0.8 V description Each circuit functions as a NAND gate or inverter, but beca

文件：784.18 Kbytes 页数：15 Pages

TI

德州仪器

丝印：LS19A；Package：SOIC；SCHMITT-TRIGGER POSITIVE-NAND GATES AND INVERTERS WITH TOTEM-POLE OUTPUTS

Functionally and Mechanically Identical to ‘L813, ‘LS14. and ‘LS132, Respectively Improved Line-Receiving Characteristics P-N-P Inputs Reduce System Loading Excellent Noise Immunity with Typical Hysteresis of 0.8 V description Each circuit functions as a NAND gate or inverter, but beca

文件：784.18 Kbytes 页数：15 Pages

TI

德州仪器

丝印：SN74LS19AN；Package：PDIP；SCHMITT-TRIGGER POSITIVE-NAND GATES AND INVERTERS WITH TOTEM-POLE OUTPUTS

Functionally and Mechanically Identical to ‘L813, ‘LS14. and ‘LS132, Respectively Improved Line-Receiving Characteristics P-N-P Inputs Reduce System Loading Excellent Noise Immunity with Typical Hysteresis of 0.8 V description Each circuit functions as a NAND gate or inverter, but beca

文件：784.18 Kbytes 页数：15 Pages

TI

德州仪器

丝印：SN74LS19AN；Package：PDIP；SCHMITT-TRIGGER POSITIVE-NAND GATES AND INVERTERS WITH TOTEM-POLE OUTPUTS

Functionally and Mechanically Identical to ‘L813, ‘LS14. and ‘LS132, Respectively Improved Line-Receiving Characteristics P-N-P Inputs Reduce System Loading Excellent Noise Immunity with Typical Hysteresis of 0.8 V description Each circuit functions as a NAND gate or inverter, but beca

文件：784.18 Kbytes 页数：15 Pages

TI

德州仪器