SN74LS114D技术资料参数供应价格摩托罗拉-114ic电子网

首页 >SN74LS114D>规格书列表

型号	下载订购	功能描述	制造商上传企业	LOGO
SN74LS114D	文件：146.37 Kbytes Page：4 Pages	DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54/74LS114A offers common clock and common clear inputs and individual J, K, and set inputs. These monolithic dual flip-flops are designed sothat when the clock goes HIGH, the inputs are enabled and data will be accepted.The logic level of the J and K inputs may be allowed to change when the 文件：146.37 Kbytes 页数：4 Pages	Motorola 摩托罗拉	Motorola
SN74LS114D	文件：240.11 Kbytes Page：8 Pages	DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET, COMMON CLEAR, AND COMMON CLOCK 文件：240.11 Kbytes 页数：8 Pages	TI 德州仪器	TI
SN74LS114N	文件：146.37 Kbytes Page：4 Pages	DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54/74LS114A offers common clock and common clear inputs and individual J, K, and set inputs. These monolithic dual flip-flops are designed sothat when the clock goes HIGH, the inputs are enabled and data will be accepted.The logic level of the J and K inputs may be allowed to change when the 文件：146.37 Kbytes 页数：4 Pages	Motorola 摩托罗拉	Motorola
SN74LS114N	文件：240.11 Kbytes Page：8 Pages	DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET, COMMON CLEAR, AND COMMON CLOCK 文件：240.11 Kbytes 页数：8 Pages	TI 德州仪器	TI

更多SN74LS114D供应商更新时间2025-12-1 15:36:00