丝印：SN74HCT623N；Package：PDIP；OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

Operating Voltage Range of 4.5 V to 5.5 V Low Power Consumption, 80-μA Max ICC Typical tpd = 11 ns ±6-mA Output Drive at 5 V Low Input Current of 1 μA Max Inputs Are TTL-Voltage Compatible Lock Bus-Latch Capability True Logic High-Current 3-State Outputs Can Drive Up To 15 LSTTL Loads

文件：273.37 Kbytes 页数：9 Pages

TI

德州仪器

Octal Bus Transceivers (with inverted 3-state outputs)/

Description This octal transceiver is designed for asynchronous two-way communication between data buses. The control function implementation allows for maximum flexibility in timng. Features • LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility • High Speed Operation:

文件：58.6 Kbytes 页数：9 Pages

HitachiHitachi Semiconductor

日立日立公司

Octal Bus Transceivers (with inverted 3-state outputs)

Description This octal bus transceiver is designed for asynchronous two-way communication between data buses. The control function implementation allows for maximum flexibility in timing. Features • LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility • High Speed Operat

文件：206.9 Kbytes 页数：9 Pages

RENESAS

瑞萨

Octal Bus Transceivers (with inverted 3-state outputs)

Description This octal bus transceiver is designed for asynchronous two-way communication between data buses. The control function implementation allows for maximum flexibility in timing. Features • LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility • High Speed Operat

文件：206.9 Kbytes 页数：9 Pages

RENESAS

瑞萨