SN74HC244MDWREP集成电路（IC）的缓冲器驱动器接收器收发器规格书PDF中文资料

SN74HC244MDWREP属于集成电路（IC）的缓冲器驱动器接收器收发器。由德州仪器制造生产的SN74HC244MDWREP缓冲器，驱动器，接收器，收发器逻辑缓冲器、驱动器、接收器和收发器允许隔离对某个电路的逻辑信号的访问，以用于另一电路。缓冲器将其输入信号（不变或反相）传递到其输出，并可能用于清除弱信号或驱动负载。在布尔逻辑仿真器中，缓冲器主要用于增加传播延迟。逻辑接收器和收发器允许在数据总线之间进行隔离通信。

Controlled Baseline

− One Assembly/Test Site, One Fabrication

Site

Extended Temperature Performance of Up

To −55°C to 125°C

Enhanced Diminishing Manufacturing

Sources (DMS) Support

Enhanced Product-Change Notification

Qualification Pedigree†

3-State Outputs Drive Bus Lines or Buffer

Memory Address Registers

High-Current Outputs Drive Up To 15

LSTTL Loads

description/ordering information

This octal buffer and line driver is designed specifically to improve both the performance and density of 3-state

memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The SN74HC244 is

organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device

passes noninverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the

high-impedance state.