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SN74GTLPH16912集成电路(IC)的通用总线功能规格书PDF中文资料

| 厂商型号 |
SN74GTLPH16912 |
| 参数属性 | SN74GTLPH16912 封装/外壳为56-TFSOP(0.173",4.40mm 宽);包装为管件;类别为集成电路(IC)的通用总线功能;产品描述:IC UNIV BUS TXRX 18BIT 56TVSOP |
| 功能描述 | 18-BIT LVTTL-TO-GTLP UNIVERSAL BUS TRANSCEIVER |
| 封装外壳 | 56-TFSOP(0.173",4.40mm 宽) |
| 文件大小 |
1.05295 Mbytes |
| 页面数量 |
19 页 |
| 生产厂商 | TI |
| 中文名称 | 德州仪器 |
| 网址 | |
| 数据手册 | |
| 更新时间 | 2025-11-17 11:35:00 |
| 人工找货 | SN74GTLPH16912价格和库存,欢迎联系客服免费人工找货 |
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SN74GTLPH16912属于集成电路(IC)的通用总线功能。由德州仪器制造生产的SN74GTLPH16912通用总线功能通用总线功能系列产品是元件级产品,用于处理或操作一系列(通常为 8 个或更多)并行逻辑信号(称为总线)。所执行的功能包括临时存储要发送或接收的数据,执行缓冲以允许输出电流容量有限的器件(例如微处理器)通过远距离互连高速传输数据,以及调换或移动总线内的位顺序等。
FEATURES
· Member of the Texas Instruments Widebus™
Family
· UBT™ Transceiver Combines D-Type Latches
and D-Type Flip-Flops for Operation in
Transparent, Latched, Clocked, and
Clock-Enabled Modes
· TI-OPC™ Circuitry Limits Ringing on
Unevenly Loaded Backplanes
· OEC™ Circuitry Improves Signal Integrity and
Reduces Electromagnetic Interference
· Bidirectional Interface Between GTLP Signal
Levels and LVTTL Logic Levels
· LVTTL Interfaces Are 5-V Tolerant
· Medium-Drive GTLP Outputs (50 mA)
· LVTTL Outputs (–24 mA/24 mA)
· GTLP Rise and Fall Times Designed for
Optimal Data-Transfer Rate and Signal
Integrity in Distributed Loads
· Ioff, Power-Up 3-State, and BIAS VCC Support
Live Insertion
· Bus Hold on A-Port Data Inputs
· Distributed VCC and GND Pins Minimize
High-Speed Switching Noise
· Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
· ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
DESCRIPTION/ORDERING INFORMATION
The SN74GTLPH16912 is a medium-drive, 18-bit UBT™ transceiver that provides LVTTL-to-GTLP and
GTLP-to-LVTTL signal-level translation. It allows for transparent, latched, clocked, and clock-enabled modes of
data transfer. The device provides a high-speed interface between cards operating at LVTTL logic levels and a
backplane operating at GTLP signal levels. High-speed (about three times faster than standard TTL or LVTTL)
backplane operation is a direct result of GTLP's reduced output swing (<1 V), reduced input threshold levels,
improved differential input, OEC™ circuitry, and TI-OPC™ circuitry. Improved GTLP OEC and TI-OPC circuits
minimize bus-settling time and have been designed and tested using several backplane models. The medium
drive allows incident-wave switching in heavily loaded backplanes with equivalent load impedance down to 19 W.
GTLP is the Texas Instruments (TI™) derivative of the Gunning Transceiver Logic (GTL) JEDEC standard
JESD 8-3. The ac specification of the SN74GTLPH16912 is given only at the preferred higher noise-margin
GTLP, but the user has the flexibility of using this device at either GTL (VTT = 1.2 V and VREF = 0.8 V) or GTLP
(VTT = 1.5 V and VREF = 1 V) signal levels.
产品属性
更多- 产品编号:
SN74GTLPH16912VR
- 制造商:
Texas Instruments
- 类别:
集成电路(IC) > 通用总线功能
- 系列:
74GTLPH
- 包装:
管件
- 逻辑类型:
通用总线收发器
- 电路数:
18 位
- 电流 - 输出高、低:
24mA,24mA
- 电压 - 供电:
3.15V ~ 3.45V
- 工作温度:
-40°C ~ 85°C
- 安装类型:
表面贴装型
- 封装/外壳:
56-TFSOP(0.173",4.40mm 宽)
- 供应商器件封装:
56-TVSOP
- 描述:
IC UNIV BUS TXRX 18BIT 56TVSOP
| 供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
TI |
24+ |
TSSOP-56 |
90000 |
一级代理商进口原装现货、假一罚十价格合理 |
询价 | ||
TI/德州仪器 |
22+ |
TSSOP56 |
12245 |
现货,原厂原装假一罚十! |
询价 | ||
TI |
25+ |
TVSOP56 |
1407 |
百分百原装正品 真实公司现货库存 本公司只做原装 可 |
询价 | ||
TI/德州仪器 |
24+ |
TSSOP56 |
9600 |
原装现货,优势供应,支持实单! |
询价 | ||
24+ |
N/A |
47000 |
一级代理-主营优势-实惠价格-不悔选择 |
询价 | |||
ADI |
23+ |
TSSOP |
8000 |
只做原装现货 |
询价 | ||
TI/德州仪器 |
23+ |
TSSOP56 |
50000 |
全新原装正品现货,支持订货 |
询价 | ||
TI |
23+ |
TVSOP56 |
12800 |
公司只有原装 欢迎来电咨询。 |
询价 | ||
TI/德州仪器 |
2447 |
14 |
100500 |
一级代理专营品牌!原装正品,优势现货,长期排单到货 |
询价 | ||
TI |
24+ |
TSSOP |
6000 |
进口原装正品假一赔十,货期7-10天 |
询价 |
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