SN74GTLP1394DR.B中文资料德州仪器数据手册PDF规格书

厂商型号	SN74GTLP1394DR.B
功能描述	2-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND SELECTABLE POLARITY
丝印标识	GTLP1394
封装外壳	SOIC
文件大小	477.95 Kbytes
页面数量	24 页
生产厂商	Texas Instruments
企业简称	TI2【德州仪器】
中文名称	美国德州仪器公司官网
原厂标识	TI2
数据手册	下载地址一下载地址二到原厂下载
更新时间	2025-8-2 11:16:00
人工找货	SN74GTLP1394DR.B价格和库存，欢迎联系客服免费人工找货

FEATURES

· TI-OPC™ Circuitry Limits Ringing on

Unevenly Loaded Backplanes

· OEC™ Circuitry Improves Signal Integrity and

Reduces Electromagnetic Interference

· Bidirectional Interface Between GTLP Signal

Levels and LVTTL Logic Levels

· Split LVTTL Port Provides a Feedback Path

for Control and Diagnostics Monitoring

· LVTTL Interfaces Are 5-V Tolerant

· High-Drive GTLP Outputs (100 mA)

· LVTTL Outputs (–24 mA/24 mA)

· Variable Edge-Rate Control (ERC) Input

Selects GTLP Rise and Fall Times for Optimal

Data-Transfer Rate and Signal Integrity in

Distributed Loads

· Ioff, Power-Up 3-State, and BIAS VCC Support

Live Insertion

· Polarity Control Selects True or

Complementary Outputs

· Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

· ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

– 1000-V Charged-Device Model (C101)