SN74CBT16800CDGGR集成电路（IC）的信号开关多路复用器解码器规格书PDF中文资料

SN74CBT16800CDGGR属于集成电路（IC）的信号开关多路复用器解码器。由德州仪器制造生产的SN74CBT16800CDGGR信号开关，多路复用器，解码器逻辑型信号开关、多路复用器和编码器 IC 可用于对以数字格式表示数据的电信号进行路由和选择。这些器件与设计用于模拟信号的类似产品有所不同，它们保留的信息表示为两个电状态之一，而不是两个外部界限内的无穷变化量。

Member of the Texas Instruments

Widebus Family

Undershoot Protection for Off-Isolation on

A and B Ports Up To −2 V

B-Port Outputs Are Precharged by Bias

Voltage (BIASV) to Minimize Signal

Distortion During Live Insertion and

Hot-Plugging

Supports PCI Hot Plug

Bidirectional Data Flow, With Near-Zero

Propagation Delay

Low ON-State Resistance (ron)

Characteristics (ron = 3 Ω Typical)

Low Input/Output Capacitance Minimizes

Loading and Signal Distortion

(Cio(OFF) = 5.5 pF Typical)

Data and Control Inputs Provide

Undershoot Clamp Diodes

Low Power Consumption

(ICC = 3 μA Max)

VCC Operating Range From 4 V to 5.5 V

Data I/Os Support 0 to 5-V Signaling Levels

(0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)

Control Inputs Can Be Driven by TTL or

5-V/3.3-V CMOS Outputs

Ioff Supports Partial-Power-Down Mode

Operation

Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

ESD Performance Tested Per JESD 22

− 2000-V Human-Body Model

(A114-B, Class II)

− 1000-V Charged-Device Model (C101)

Supports Both Digital and Analog

Applications: PCI Interface, Memory

Interleaving, Bus Isolation, Low-Distortion

Signal Gating

description/ordering information

The SN74CBT16800C is a high-speed TTL-compatible FET bus switch with low ON-state resistance (ron),

allowing for minimal propagation delay. Active Undershoot-Protection Circuitry on the A and B ports of the

SN74CBT16800C provides protection for undershoot up to −2 V by sensing an undershoot event and ensuring

that the switch remains in the proper OFF state. The device also precharges the B port to a user-selectable bias

voltage (BIASV) to minimize live-insertion noise.

The SN74CBT16800C is organized as two 10-bit bus switches with separate output-enable (1OE, 2OE) inputs.

It can be used as two 10-bit bus switches or as one 20-bit bus switch. When OE is low, the associated 10-bit

bus switch is ON, and the A port is connected to the B port, allowing bidirectional data flow between ports. When

OE is high, the associated 10-bit bus switch is OFF, and a high-impedance state exists between the A and B

ports. The B port is precharged to BIASV through the equivalent of a 10-kΩ resistor when OE is high, or if the

device is powered down (VCC = 0 V).

During insertion (or removal) of a card into (or from) an active bus, the card’s output voltage may be close to

GND. When the connector pins make contact, the card’s parasitic capacitance tries to force the bus signal to

GND, creating a possible glitch on the active bus. This glitching effect can be reduced by using a bus switch

with precharged bias voltage (BIASV) of the bus switch equal to the input threshold voltage level of the receivers

on the active bus. This method will ensure that any glitch produced by insertion (or removal) of the card will not

cross the input threshold region of the receivers on the active bus, minimizing the effects of live-insertion noise.

This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that

damaging current will not backflow through the device when it is powered down. The device has isolation during

power off.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.