SN74AXC8T245PWRG4中文资料德州仪器数据手册PDF规格书

1 Features

• Qualified fully configurable dual-rail design allows

each port to operate with a power supply range

from 0.65V to 3.6V

• Operating temperature from –40°C to +125°C

• Multiple direction-control pins to allow

simultaneous up and down translation

• Up to 380Mbps support when translating from 1.8V

to 3.3V

• VCC isolation feature to effectively Isolate both

buses in a power-down scenario

• Partial power-down mode to limit backflow current

in a power-down scenario

• Compatible with SN74AVC8T245 and

74AVC8T245 level shifters

• Latch-up performance exceeds 100mA per JESD

78, class II

• ESD protection exceeds JESD 22

– 8000-V human-body model

– 1000-V charged-device model

2 Applications

• Enterprise and communications

• Industrial

• Personal electronics

• Wireless infrastructure

• Building automation

• Point of sale

3 Description

The SN74AXC8T245 device is an 8-bit non-inverting

bus transceiver that resolves voltage level mismatch

between devices operating at the latest voltage nodes

(0.7V, 0.8V, and 0.9V) and devices operating at

industry standard voltage nodes (1.8V, 2.5V, and

3.3V) and vice versa.

The device operates by using two independent powersupply

rails (VCCA and VCCB) that operate as low as

0.65V. Data pins A1 through A8 are designed to track

VCCA, which accepts any supply voltage from 0.65V to

3.6V. Data pins B1 through B8 are designed to track

VCCB, which accepts any supply voltage from 0.65V to

3.6V.

The SN74AXC8T245 device is designed for

asynchronous communication between data buses.

The device transmits data from the A bus to the B bus

or from the B bus to the A bus, depending on the logic

level of the direction-control inputs (DIR1 and DIR2).

The output-enable (OE) input is used to disable the

outputs so the buses are effectively isolated.

The SN74AXC8T245 device is designed so the

control pins (DIR and OE) are referenced to VCCA.

This device is fully specified for partial-power-down

applications using Ioff. The Ioff circuitry disables

the outputs when the device is powered down.

This inhibits current backflow into the device which

prevents damage to the device.

The VCC isolation feature is designed so that if

either VCC input supply is below 100mV, all level

shifter outputs are disabled and placed into a highimpedance

state.

To put the level shifter I/Os in the high-impedance

state during power up or power down, tie OE to VCCA

through a pullup resistor; the current-sinking capability

of the driver determines the minimum value of the

resistor.