SN74AVC8T245-Q1中文资料具有可配置电压转换和三态输出的汽车类 8 位双电源总线收发器数据手册TI规格书

描述 Description

The SN74AVC8T245-Q1 is an 8-bit noninverting bus transceiver that uses two separate configurable power-supply rails. The SN74AVC8T245-Q1 operation is optimimal with VCCA and VCCB set at1.4 V to 3.6 V. It is operational with VCCA and VCCB as low as 1.2 V. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.2 V to 3.6 V. This allows for universal low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.

The SN74AVC8T245 design enables asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. One can use the output-enable (OE) input to disable the outputs so the buses are effectively isolated.

In the SN74AVC8T245 design, VCCA supplies the control pins (DIR and OE).

This device specification covers partial-power-down applications using Ioff. The Ioff circuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device.

The VCC isolation feature ensures that if either VCC input is at GND, both ports are in the high-impedance state.

To ensure the high-impedance state during power up or power down, tie OE to VCC through a pullup resistor; the current-sinking capability of the driver determines the minimum value of the resistor.

特性 Features

• Qualified for Automotive Applications
• Device Temperature Grade 1: –40°C to +125°C Ambient Operating Temperature Range
• Device CDM ESD Classification Level C3B
• Control Inputs VIH and VIL Levels Are Referenced to VCCA Voltage
• Ioff Supports Partial Power-Down-Mode Operation
• I/Os Are 4.6-V Tolerant
• 170 Mbps (VCCA  CCB  CCA  ≥ 1.8 V and VCCB  ≥ 1.8 V)
• Latch-Up Performance Exceeds 100 mA per JESD 78, Class II