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SN74AVC16834DGVR.B中文资料德州仪器数据手册PDF规格书

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厂商型号

SN74AVC16834DGVR.B

功能描述

18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS

丝印标识

CVA834

封装外壳

TVSOP

文件大小

1.01754 Mbytes

页面数量

22

生产厂商

TI

中文名称

德州仪器

网址

网址

数据手册

下载地址一下载地址二到原厂下载

更新时间

2025-10-4 10:38:00

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SN74AVC16834DGVR.B规格书详情

FEATURES

· Member of the Texas Instruments Widebus™

Family

· DOC™ (Dynamic Output Control) Circuit

Dynamically Changes Output Impedance,

Resulting in Noise Reduction Without Speed

Degradation

· Dynamic Drive Capability Is Equivalent to

Standard Outputs With IOH and IOL of ±24 mA

at 2.5-V VCC

· Overvoltage-Tolerant Inputs/Outputs Allow

Mixed-Voltage-Mode Data Communications

· Ioff Supports Partial-Power-Down Mode

Operation

· ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

· Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

DESCRIPTION/ORDERING INFORMATION

A Dynamic Output Control (DOC™) circuit is implemented, which, during the transition, initially lowers the output

impedance to effectively drive the load and, subsequently, raises the impedance to reduce noise. Figure 1 shows

typical VOL vs IOL and VOH vs IOH curves to illustrate the output impedance and drive capability of the circuit. At

the beginning of the signal transition, the DOC circuit provides a maximum dynamic drive that is equivalent to a

high-drive standard-output device. For more information, refer to the TI application reports, AVC Logic Family

Technology and Applications, literature number SCEA006, and Dynamic Output Control (DOC™) Circuitry

Technology and Applications, literature number SCEA009.

This 18-bit universal bus driver is operational at 1.2-V to 3.6-V VCC, but is designed specifically for 1.65-V to

3.6-V VCC operation.

Data flow from A to Y is controlled by the output-enable (OE) input. The device operates in the transparent mode

when the latch-enable (LE) input is low. The A data is latched if the clock (CLK) input is held at a high or low

logic level. If LE is high, the A data is stored in the latch/flip-flop on the low-to-high transition of CLK. When OE is

high, the outputs are in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,

preventing damaging current backflow through the device when it is powered down.

供应商 型号 品牌 批号 封装 库存 备注 价格
TI/德州仪器
22+
TSOP
11190
原装正品
询价
TI
22+
56TSSOP
9000
原厂渠道,现货配单
询价
TI
24+
3000
自己现货
询价
TI/德州仪器
24+
TSSOP56
2140
只供应原装正品 欢迎询价
询价
TI
2025+
TSSOP-56
16000
原装优势绝对有货
询价
TI
25+
TSSOP
10000
强调现货,随时查询!
询价
TI
16+
原厂封装
10000
全新原装正品,代理优势渠道供应,欢迎来电咨询
询价
Texas Instruments
24+
56-TSSOP
65300
一级代理/放心采购
询价
TI
16+
TSSOP-56
8000
原装现货请来电咨询
询价
TI/德州仪器
23+
TSSOP-56
50000
全新原装正品现货,支持订货
询价