SN74AUP2G125YFPR集成电路（IC）的缓冲器驱动器接收器收发器规格书PDF中文资料

SN74AUP2G125YFPR属于集成电路（IC）的缓冲器驱动器接收器收发器。由德州仪器制造生产的SN74AUP2G125YFPR缓冲器，驱动器，接收器，收发器逻辑缓冲器、驱动器、接收器和收发器允许隔离对某个电路的逻辑信号的访问，以用于另一电路。缓冲器将其输入信号（不变或反相）传递到其输出，并可能用于清除弱信号或驱动负载。在布尔逻辑仿真器中，缓冲器主要用于增加传播延迟。逻辑接收器和收发器允许在数据总线之间进行隔离通信。

1FEATURES

• Available in the Texas Instruments NanoStar™

Package

• Low Static-Power Consumption

(ICC = 0.9 mA Max)

• Low Dynamic-Power Consumption

(Cpd = 4 pF Typ at 3.3 V)

• Low Input Capacitance (CI = 1.5 pF Typ)

• Low Noise – Overshoot and Undershoot

<10% of VCC

• Input-Disable Feature Allows Floating Input

Conditions

• Ioff Supports Partial-Power-Down Mode

Operation

• Input Hysteresis Allows Slow Input Transition

and Better Switching Noise Immunity at Input

• Wide Operating VCC Range of 0.8 V to 3.6 V

• Optimized for 3.3-V Operation

• 3.6-V I/O Tolerant to Support Mixed-Mode

Signal Operation

• tpd = 5.4 ns Max at 3.3 V

• Suitable for Point-to-Point Applications

• Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

• ESD Performance Tested Per JESD 22

– 2000-V Human-Body Model

(A114-B, Class II)

– 1000-V Charged-Device Model (C101)

DESCRIPTION/ORDERING INFORMATION

The AUP family is TI's premier solution to the industry's low-power needs in battery-powered portable

applications. This family ensures a very low static and dynamic power consumption across the entire VCC range

of 0.8 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity (see

Figure 1 and Figure 2).

The SN74AUP2G125 is a dual bus buffer gate designed for 0.8-V to 3.6-V VCC operation. This device features

dual line drivers with 3-state outputs. Each output is disabled when the corresponding output-enable (OE) input is

high. This device has the input-disable feature, which allows floating input signals.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the

package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,

preventing damaging current backflow through the device when it is powered down.