SN74ALVCH16841DLR集成电路（IC）的锁存器规格书PDF中文资料

SN74ALVCH16841DLR属于集成电路（IC）的锁存器。由美国德州仪器公司制造生产的SN74ALVCH16841DLR锁存器锁存器是类似于触发器的基本数字存储设备，但是不同之处在于，在锁存使能（或类似命名）信号处于有效逻辑状态的任何时间，保持的逻辑状态都可以改变。“透明”锁存器还允许设备输出在锁存使能信号有效时反映输入的当前状态，而相反的是，状态仅在保持状态已固定时改变。

FEATURES

· Member of the Texas Instruments Widebus™

Family

· EPIC™ (Enhanced-Performance Implanted

CMOS) Submicron Process

· ESD Protection Exceeds 2000 V Per

MIL-STD-883, Method 3015; Exceeds 200 V

Using Machine Model (C = 200 pF, R = 0)

· Latch-Up Performance Exceeds 250 mA Per

JESD 17

· Bus Hold on Data Inputs Eliminates the Need

for External Pullup/Pulldown Resistors

· Package Options Include Plastic 300-mil

Shrink Small-Outline (DL) and Thin Shrink

Small-Outline (DGG) Packages

DESCRIPTION

This 20-bit bus-interface D-type latch is designed for

1.65-V to 3.6-V VCC operation.

The SN74ALVCH16841 features 3-state outputs

designed specifically for driving highly capacitive or

relatively low-impedance loads. This device is

particularly suitable for implementing buffer registers,

unidirectional bus drivers, and working registers.

The SN74ALVCH16841 can be used as two 10-bit

latches or one 20-bit latch. The 20 latches are

transparent D-type latches. The device has

noninverting data (D) inputs and provides true data at

its outputs. While the latch-enable (1LE or 2LE) input

is high, the Q outputs of the corresponding 10-bit

latch follow the D inputs. When LE is taken low, the Q

outputs are latched at the levels set up at the D

inputs.

A buffered output-enable (1OE or 2OE) input can be used to place the outputs of the corresponding 10-bit latch

in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state,

the outputs neither load nor drive the bus lines significantly.

OE does not affect the internal operation of the latches. Old data can be retained or new data can be entered

while the outputs are in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

The SN74ALVCH16841 is characterized for operation from -40°C to 85°C.