丝印：ALVCH16841；Package：SSOP；20-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS

FEATURES · Member of the Texas Instruments Widebus™ Family · EPIC™ (Enhanced-Performance Implanted CMOS) Submicron Process · ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) · Latch-Up Performance Exceeds 250 mA Per JESD 17

文件：589.24 Kbytes 页数：19 Pages

TI

德州仪器

20-bit bus interface D-type latch 3-State

DESCRIPTION The 74ALVCH16841 has two 10-bit D-type latch featuring separate D-type inputs for each latch and 3-State outputs for bus oriented applications. The two sections of each register are controlled independently by the latch enable (nLE) and output enable (nOE) control gates. FEATUR

文件：77.81 Kbytes 页数：10 Pages

PHI

飞利浦

20-bit bus interface D-type latch; 3-state

1. General description The 74ALVCH16841 has two 10-bit D-type latch featuring separate D-type inputs for each latch and 3-state outputs for bus oriented applications. The two sections of each register are controlled independently by the latch enable (nLE) and output enable (nOE) control gates.

文件：215.77 Kbytes 页数：12 Pages

NEXPERIA

安世

20-bit bus interface D-type latch 3-State

DESCRIPTION The 74ALVCH16841 has two 10-bit D-type latch featuring separate D-type inputs for each latch and 3-State outputs for bus oriented applications. The two sections of each register are controlled independently by the latch enable (nLE) and output enable (nOE) control gates. FEATUR

文件：77.81 Kbytes 页数：10 Pages

PHI

飞利浦