SN74ALS843DWR.A中文资料德州仪器数据手册PDF规格书

3-State Buffer-Type Outputs Drive Bus

Lines Directly

Bus-Structured Pinout

Provides Extra Bus-Driving Latches

Necessary for Wider Address/Data Paths or

Buses With Parity

Buffered Control Inputs to Reduce

dc Loading Effects

Power-Up High-Impedance State

Package Options Include Plastic

Small-Outline (DW) Packages and Standard

Plastic (NT) 300-mil DIPs

description

This 9-bit bus-interface D-type latch features

3-state outputs designed specifically for driving

highly capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers,

I/O ports, bidirectional bus drivers, and working registers.

The nine latches are transparent D-type latches with noninverting data (D) inputs.

A buffered output-enable (OE) input places the nine outputs in either a normal logic state (high or low logic levels)

or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines

significantly. The high-impedance state and increased drive provide the capability to drive bus lines without

interface or pullup components.

OE does not affect the internal operation of the latches. Previously stored data can be retained or new data can

be entered while the outputs are off.

The SN74ALS843 is characterized for operation from 0°C to 70°C.