SN74ALS841中文资料具有三态输出的 10 位总线接口 D 类锁存器数据手册TI规格书

描述 Description

These 10-bit latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
The ten latches are transparent D-type latches. The SN74ALS841 and SN74AS841A have noninverting data (D) inputs. The SN74ALS842 has inverting D\\ inputs.
A buffered output-enable () input places the ten outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components.
does not affect the internal operation of the latches. Previously stored data can be retained or new data can be entered while the outputs are off.
The SN74ALS841, SN74AS841A, and SN74ALS842 are characterized for operation from 0°C to 70°C.

特性 Features

• 3-State Buffer-Type Outputs Drive Bus Lines Directly
• Bus-Structured Pinout
• Provide Extra Bus-Driving Latches Necessary for WiderAddress/Data Paths or Buses With Parity
• Buffered Control Inputs to Reduce dc Loading Effects
• Power-Up High-Impedance State
• Package Options Include Plastic Small-Outline (DW) Packagesand Standard Plastic (NT) 300-mil DIPs