SN74ALS621A-1数据手册集成电路（IC）的缓冲器驱动器接收器收发器规格书PDF

描述 Description

These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation allows for maximum flexibility in timing.These devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic levels at the output-enable (OEAB and ) inputs.The output-enable inputs disable the device so that the buses are effectively isolated. The dual-enable configuration gives the transceivers the capability to store data by simultaneously enabling OEAB and . Each output reinforces its input in this transceiver configuration. When both OEAB andare enabled and all other data sources to the two sets of bus lines are in the high-impedance state, both sets of bus lines (16 total) remain at their last states. The 8-bit codes appearing on the two sets of buses are identical for the SN74ALS621A, SN74ALS623A, and SN74AS623 or complementary for the SN74ALS620A.The -1 versions of the SN74ALS620A and SN74ALS621A are identical to the standard versions, except that the recommended maximum IOL is increased to 48 mA in the -1 versions.The SN74ALS620A, SN74ALS621A, SN74ALS623A, and SN74AS623 are characterized for operation from 0°C to 70°C.  

特性 Features

• Local Bus-Latch Capability
• Choice of True or Inverting Logic
• Package Options Include Plastic Small-Outline (DW) Packages and Standard Plastic (N) 300-mil DIPs