SN74ALS541-1DWR集成电路（IC）的缓冲器驱动器接收器收发器规格书PDF中文资料

SN74ALS541-1DWR属于集成电路（IC）的缓冲器驱动器接收器收发器。由德州仪器制造生产的SN74ALS541-1DWR缓冲器，驱动器，接收器，收发器逻辑缓冲器、驱动器、接收器和收发器允许隔离对某个电路的逻辑信号的访问，以用于另一电路。缓冲器将其输入信号（不变或反相）传递到其输出，并可能用于清除弱信号或驱动负载。在布尔逻辑仿真器中，缓冲器主要用于增加传播延迟。逻辑接收器和收发器允许在数据总线之间进行隔离通信。

* 3-State Outputs Drive Bus Lines or Buffer

Memory Address Registers

* pnp Inputs Reduce dc Loading

* Data Flowthrough Pinout (All Inputs on

Opposite Side From Outputs)

description

These octal buffers and line drivers are designed

to have the performance of the popular

SN54ALS240A/SN74ALS240A series and, at

the same time, offer a pinout with inputs and

outputs on opposite sides of the package. This

arrangement greatly facilitates printed circuit

board layout.

The 3-state control gate is a 2-input NOR gate

such that, if either output-enable (OE1 or OE2)

input is high, all eight outputs are in the

high-impedance state.

The SN74ALS540 provides inverted data. The

’ALS541 provide true data at the outputs.

The -1 versions of SN74ALS540 and

SN74ALS541 are identical to the standard

versions, except that the recommended

maximum IOL is increased to 48 mA. There is no

-1 version of the SN54ALS541.