SN74AHCT594-Q1中文资料德州仪器数据手册PDF规格书

1 Features

• AEC-Q100 qualified for automotive applications:

– Device temperature grade 1: -40°C to +125°C

– Device HBM ESD classification level 2

– Device CDM ESD classification level C4B

• Available in wettable flank QFN (WBQA) package

• Operating range 4.5V to 5.5V VCC

• TTL-Compatible inputs

• Low delay, 12.4ns max (VCC = 5V, CL = 50pF)

• Latch-up performance exceeds 250mA

per JESD 17

2 Applications

• Increase the number of outputs on a

microcontroller

• Store up to 8 bits of data temporarily

3 Description

The SN74AHCT594-Q1 is an 8-bit serial-in, parallelout

shift register that feeds an 8-bit D-type storage

register. Separate clocks (RCLK, SRCLK) and direct

overriding clear (RCLR, SRCLR) inputs are provided

on both the shift and storage registers. A serial (QH')

output is provided for cascading purposes.

Both the shift register (SRCLK) and storage register

(RCLK) clocks are positive edge triggered. If both

clocks are connected together, the shift register

always is one clock pulse ahead of the storage

register.