丝印：AHCT373；Package：VQFN(RKS)；SNx4AHCT373 Octal Transparent D-Type Latches With 3-State Outputs

1 Features • Operating range 4.5V to 5.5V VCC • TTL-Compatible inputs • Low delay, 9.5ns (5V VCC at CL = 15pF) • Latch-up performance exceeds 250mA per JESD 17 • On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production proc

文件：2.99431 Mbytes 页数：50 Pages

TI

德州仪器

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

文件：234.3 Kbytes 页数：6 Pages

UTC

友顺

Octal D-type transparent latch; 3-state

DESCRIPTION The 74AHC/AHCT373 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V

文件：97.46 Kbytes 页数：20 Pages

PHI

飞利浦

Octal D-type transparent latch; 3-state

DESCRIPTION The 74AHC/AHCT373 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V

文件：97.46 Kbytes 页数：20 Pages

PHI

飞利浦