SN74ACT533PWR集成电路（IC）的锁存器规格书PDF中文资料

SN74ACT533PWR属于集成电路（IC）的锁存器。由德州仪器制造生产的SN74ACT533PWR锁存器锁存器是类似于触发器的基本数字存储设备，但是不同之处在于，在锁存使能（或类似命名）信号处于有效逻辑状态的任何时间，保持的逻辑状态都可以改变。“透明”锁存器还允许设备输出在锁存使能信号有效时反映输入的当前状态，而相反的是，状态仅在保持状态已固定时改变。

4.5-V to 5.5-V VCC Operation

Inputs Accept Voltages to 5.5 V

Max tpd of 11 ns at 5 V

Inputs Are TTL-Voltage Compatible

3-State Inverting Outputs Drive Bus Lines

Directly

description/ordering information

The ’ACT533 devices are octal transparent

D-type latches with 3-state outputs. When the

latch-enable (LE) input is high, the Q outputs

follow the complements of the data (D) inputs.

When LE is taken low, the Q outputs are latched

at the inverted levels set up at the D inputs.

A buffered output-enable (OE) input can be used

to place the eight outputs in either a normal logic

state (high or low logic levels) or the

high-impedance state. In the high-impedance

state, the outputs neither load nor drive the bus

lines significantly. The high-impedance state and

increased drive provide the capability to drive bus

lines without need for interface or pullup

components.

OE does not affect the internal operations of the

latches. Old data can be retained or new data can

be entered while the outputs are in the

high-impedance state.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.