9-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS

文件：120.46 Kbytes 页数：17 Pages

TI

德州仪器

9-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS

文件：120.46 Kbytes 页数：17 Pages

TI

德州仪器

Package：24-DIP（0.300"，7.62mm）；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 类别：集成电路（IC） 锁存器 描述：IC 10BIT BUS INT D LATCH 24-DIP

TI

德州仪器

9-bit interface latch with set and reset 3-State

DESCRIPTION The 74ABT843 Bus interface latch is designed to eliminate the extra packages required to buffer existing registers and provide extra data width for wider data/address paths of buses carrying parity. FEATURES • High speed parallel latches • Extra data width for wide address/data pat

文件：113.86 Kbytes 页数：14 Pages

PHI

PHI

9-bit interface latch with set and reset 3-State

DESCRIPTION The 74ABT843 Bus interface latch is designed to eliminate the extra packages required to buffer existing registers and provide extra data width for wider data/address paths of buses carrying parity. FEATURES • High speed parallel latches • Extra data width for wide address/data pat

文件：113.86 Kbytes 页数：14 Pages

PHI

PHI

9-bit interface latch with set and reset 3-State

DESCRIPTION The 74ABT843 Bus interface latch is designed to eliminate the extra packages required to buffer existing registers and provide extra data width for wider data/address paths of buses carrying parity. FEATURES • High speed parallel latches • Extra data width for wide address/data pat

文件：113.86 Kbytes 页数：14 Pages

PHI

PHI