SN74ABT16241ADGVR集成电路（IC）的缓冲器驱动器接收器收发器规格书PDF中文资料

SN74ABT16241ADGVR属于集成电路（IC）的缓冲器驱动器接收器收发器。由美国德州仪器公司制造生产的SN74ABT16241ADGVR缓冲器，驱动器，接收器，收发器逻辑缓冲器、驱动器、接收器和收发器允许隔离对某个电路的逻辑信号的访问，以用于另一电路。缓冲器将其输入信号（不变或反相）传递到其输出，并可能用于清除弱信号或驱动负载。在布尔逻辑仿真器中，缓冲器主要用于增加传播延迟。逻辑接收器和收发器允许在数据总线之间进行隔离通信。

Members of the Texas Instruments

WidebusE Family

State-of-the-Art EPIC-IIBE BiCMOS Design

Significantly Reduces Power Dissipation

Typical VOLP (Output Ground Bounce) < 1 V

at VCC = 5 V, TA = 25°C

Distributed VCC and GND Pin Configuration

Minimizes High-Speed Switching Noise

Flow-Through Architecture Optimizes PCB

Layout

High-Drive Outputs (–32-mA IOH, 64-mA IOL)

Latch-Up Performance Exceeds 500 mA

Per JESD 17

ESD Protection Exceeds 2000 V Per

MIL-STD-883, Method 3015; Exceeds 200 V

Using Machine Model (C = 200 pF, R = 0)

Package Options Include Plastic 300-mil

Shrink Small-Outline (DL), Thin Shrink

Small-Outline (DGG), and Thin Very

Small-Outline (DGV) Packages and 380-mil

Fine-Pitch Ceramic Flat (WD) Package

Using 25-mil Center-to-Center Spacings

description

The ’ABT16241A devices are 16-bit buffers and

line drivers designed specifically to improve both

the performance and density of 3-state memory

address drivers, clock drivers, and bus-oriented

receivers and transmitters.

These devices can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. These devices provide

true outputs and complementary output-enable (OE and OE) inputs.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. OE

should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the

current-sourcing capability of the driver.

The SN54ABT16241A is characterized for operation over the full military temperature range of –55°C to 125°C.

The SN74ABT16241A is characterized for operation from –40°C to 85°C.