SN74ABT126中文资料具有 TTL 兼容型 CMOS 输入和三态输出的 4 通道、4.5V 至 5.5V 缓冲器数据手册TI规格书

描述 Description

The ’ABT126 bus buffer gates feature independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is low.

When VCC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 2.1 V, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

特性 Features

• Typical VOLP (Output Ground Bounce)    CC = 5 V, TA = 25°C
• High-Impedance State During Power Up and Power Down
• High-Drive Outputs (–32-mA IOH, 64-mA IOL)
• Ioff and Power-Up 3-State Support Hot Insertion
• Latch-Up Performance Exceeds 500 mA Per JESD 17
• ESD Protection Exceeds JESD 22
• 2000-V Human-Body Model (A114-A)
• 200-V Machine Model (A115-A)