丝印：LVDT348；Package：SOIC；QUAD HIGH-SPEED DIFFERENTIAL RECEIVERS

FEATURES · Meets or Exceeds the Requirements of ANSI TIA/EIA-644A Standard · Single-Channel Signaling Rates up to 560 Mbps · -4 V to 5 V Common-Mode Input Voltage Range · Flow-Through Architecture · Active Failsafe Assures a High-level Output When an Input Signal Is not Present · SN65LVD

文件：740.2 Kbytes 页数：30 Pages

TI

德州仪器

丝印：LVDT348；Package：SOIC；QUAD HIGH-SPEED DIFFERENTIAL RECEIVERS

FEATURES · Meets or Exceeds the Requirements of ANSI TIA/EIA-644A Standard · Single-Channel Signaling Rates up to 560 Mbps · -4 V to 5 V Common-Mode Input Voltage Range · Flow-Through Architecture · Active Failsafe Assures a High-level Output When an Input Signal Is not Present · SN65LVD

文件：740.2 Kbytes 页数：30 Pages

TI

德州仪器

丝印：DE348；Package：TSSOP；QUAD HIGH-SPEED DIFFERENTIAL RECEIVERS

FEATURES · Meets or Exceeds the Requirements of ANSI TIA/EIA-644A Standard · Single-Channel Signaling Rates up to 560 Mbps · -4 V to 5 V Common-Mode Input Voltage Range · Flow-Through Architecture · Active Failsafe Assures a High-level Output When an Input Signal Is not Present · SN65LVD

文件：740.2 Kbytes 页数：30 Pages

TI

德州仪器

丝印：DE348；Package：TSSOP；QUAD HIGH-SPEED DIFFERENTIAL RECEIVERS

FEATURES · Meets or Exceeds the Requirements of ANSI TIA/EIA-644A Standard · Single-Channel Signaling Rates up to 560 Mbps · -4 V to 5 V Common-Mode Input Voltage Range · Flow-Through Architecture · Active Failsafe Assures a High-level Output When an Input Signal Is not Present · SN65LVD

文件：740.2 Kbytes 页数：30 Pages

TI

德州仪器

丝印：DE348；Package：TSSOP；QUAD HIGH-SPEED DIFFERENTIAL RECEIVERS

FEATURES · Meets or Exceeds the Requirements of ANSI TIA/EIA-644A Standard · Single-Channel Signaling Rates up to 560 Mbps · -4 V to 5 V Common-Mode Input Voltage Range · Flow-Through Architecture · Active Failsafe Assures a High-level Output When an Input Signal Is not Present · SN65LVD

文件：740.2 Kbytes 页数：30 Pages

TI

德州仪器

丝印：DE348；Package：TSSOP；QUAD HIGH-SPEED DIFFERENTIAL RECEIVERS

FEATURES · Meets or Exceeds the Requirements of ANSI TIA/EIA-644A Standard · Single-Channel Signaling Rates up to 560 Mbps · -4 V to 5 V Common-Mode Input Voltage Range · Flow-Through Architecture · Active Failsafe Assures a High-level Output When an Input Signal Is not Present · SN65LVD

文件：740.2 Kbytes 页数：30 Pages

TI

德州仪器

丝印：DE348；Package：TSSOP；QUAD HIGH-SPEED DIFFERENTIAL RECEIVERS

FEATURES · Meets or Exceeds the Requirements of ANSI TIA/EIA-644A Standard · Single-Channel Signaling Rates up to 560 Mbps · -4 V to 5 V Common-Mode Input Voltage Range · Flow-Through Architecture · Active Failsafe Assures a High-level Output When an Input Signal Is not Present · SN65LVD

文件：740.2 Kbytes 页数：30 Pages

TI

德州仪器

丝印：DE348；Package：TSSOP；QUAD HIGH-SPEED DIFFERENTIAL RECEIVERS

FEATURES · Meets or Exceeds the Requirements of ANSI TIA/EIA-644A Standard · Single-Channel Signaling Rates up to 560 Mbps · -4 V to 5 V Common-Mode Input Voltage Range · Flow-Through Architecture · Active Failsafe Assures a High-level Output When an Input Signal Is not Present · SN65LVD

文件：740.2 Kbytes 页数：30 Pages

TI

德州仪器

丝印：LVDT34；Package：SOIC；HIGH-SPEED DIFFERENTIAL RECEIVERS

1FEATURES • 400-Mbps Signaling Rate(1) and 200-Mxfr/s Data Transfer Rate • Operates With a Single 3.3-V Supply • -4 V to 5 V Common-Mode Input Voltage Range • Differential Input Thresholds

文件：685.33 Kbytes 页数：28 Pages

TI

德州仪器

丝印：LVDT34；Package：SOIC；HIGH-SPEED DIFFERENTIAL RECEIVERS

1FEATURES • 400-Mbps Signaling Rate(1) and 200-Mxfr/s Data Transfer Rate • Operates With a Single 3.3-V Supply • -4 V to 5 V Common-Mode Input Voltage Range • Differential Input Thresholds

文件：685.33 Kbytes 页数：28 Pages

TI

德州仪器