HIGH-SPEED DIFFERENTIAL LINE RECEIVER

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HIGH-SPEED DIFFERENTAIL LINE DRIVER/RECEIVERS

文件：282.82 Kbytes 页数：18 Pages

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HIGH-SPEED DIFFERENTIAL LINE DRIVER/RECEIVERS

文件：473.39 Kbytes 页数：21 Pages

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HIGH-SPEED DIFFERENTIAL LINE DRIVER/RECEIVERS

文件：522.23 Kbytes 页数：22 Pages

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High-Speed Differential Line Drivers and Receivers

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单路 LVDS 接收器

The SN65LVDS1, SN65LVDS2, and SN65LVDT2 devices are single, low-voltage, differential line drivers and receivers in the small-outline transistor package. The outputs comply with the TIA/EIA-644 standard and provide a minimum differential output voltage magnitude of 247 mV into a 100-Ω load at signal • Meets or Exceeds the ANSI TIA/EIA-644 Standard\n• 400 Mbps for Receivers\n• Available in SOT-23 and SOIC Packages\n• Low-Voltage Differential Signaling With Typical Output Voltages of 350 mV Into a 100-Ω Load\n• 2.5-ns Typical Receiver\n• 60 mW Typical Receiver\n• Low Voltage TTL (LVTTL) Level Dri;

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LVDS 4x4 CROSSPOINT SWITCH

FEATURES · Greater Than 2.0 Gbps Operation · Nonblocking Architecture Allows Each Output to be Connected to Any Input · Pk-Pk Jitter: – 60 ps Typical at 2.0 Gbps – 110 ps Typical at 2.5 Gbps · Compatible With ANSI TIA/EIA-644-A LVDS Standard · Available Packaging 38-Pin TSSOP · 25 mV of

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丝印：LVDT250；Package：TSSOP；LVDS 4x4 CROSSPOINT SWITCH

FEATURES · Greater Than 2.0 Gbps Operation · Nonblocking Architecture Allows Each Output to be Connected to Any Input · Pk-Pk Jitter: – 60 ps Typical at 2.0 Gbps – 110 ps Typical at 2.5 Gbps · Compatible With ANSI TIA/EIA-644-A LVDS Standard · Available Packaging 38-Pin TSSOP · 25 mV of

文件：498.01 Kbytes 页数：22 Pages

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德州仪器

丝印：LVDT250；Package：TSSOP；LVDS 4x4 CROSSPOINT SWITCH

FEATURES · Greater Than 2.0 Gbps Operation · Nonblocking Architecture Allows Each Output to be Connected to Any Input · Pk-Pk Jitter: – 60 ps Typical at 2.0 Gbps – 110 ps Typical at 2.5 Gbps · Compatible With ANSI TIA/EIA-644-A LVDS Standard · Available Packaging 38-Pin TSSOP · 25 mV of

文件：498.01 Kbytes 页数：22 Pages

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德州仪器

丝印：LVDT250；Package：TSSOP；LVDS 4x4 CROSSPOINT SWITCH

FEATURES · Greater Than 2.0 Gbps Operation · Nonblocking Architecture Allows Each Output to be Connected to Any Input · Pk-Pk Jitter: – 60 ps Typical at 2.0 Gbps – 110 ps Typical at 2.5 Gbps · Compatible With ANSI TIA/EIA-644-A LVDS Standard · Available Packaging 38-Pin TSSOP · 25 mV of

文件：498.01 Kbytes 页数：22 Pages

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德州仪器