SN65LVDT101DR集成电路（IC）的信号缓冲器、中继器、分离器规格书PDF中文资料

SN65LVDT101DR属于集成电路（IC）的信号缓冲器、中继器、分离器。由德州仪器制造生产的SN65LVDT101DR信号缓冲器、中继器、分离器信号缓冲器、中继器和分离器系列中的产品适用于远距离电气互连或电缆系统的数字信息传输。所有实际互连系统都具有非理想特性，该系列产品主要用于解决数字信息传输过程中因此造成的模拟问题。此外，还有其他功能，例如不同物理接口样式之间的转换和多路复用。

1 Features

1• Designed for Signaling Rates ≥ 2 Gbps

• Total Jitter < 65 ps

• Low-Power Alternative for the MC100EP16

• Low 100-ps (Maximum) Part-to-Part Skew

• 25 mV of Receiver Input Threshold Hysteresis

Over 0-V to 4-V Input Voltage Range

• Inputs Electrically Compatible With LVPECL,

CML, and LVDS Signal Levels

• 3.3-V Supply Operation

• LVDT Integrates 110-Ω Terminating Resistor

• Offered in SOIC and MSOP

2 Applications

• Wireless Infrastructure

• Telecom Infrastructure

• Printers

3 Description

The SN65LVDS100, SN65LVDT100, SN65LVDS101,

and SN65LVDT101 are high-speed differential receivers and drivers connected as repeaters. The

receiver accepts low-voltage differential signaling

(LVDS), positive-emitter-coupled logic (PECL), or

current-mode logic (CML) input signals at rates up to

2 Gbps and repeats it as either an LVDS or PECL output signal. The signal path through the device is

differential for low radiated emissions and minimal

added jitter.