丝印：SN65LVDS96；Package：TSSOP；LVDS SERDES RECEIVER

FEATURES · 3:21 Data Channel Compression at up to 1.428 Gigabits/s Throughput · Suited for Point-to-Point Subsystem Communication With Very Low EMI · 3 Data Channels and Clock Low-Voltage Differential Channels in and 21 Data and Clock Low-Voltage TTL Channels Out · Operates From a Single 3

文件：452.1 Kbytes 页数：22 Pages

TI

德州仪器

LVDS SERDES RECEIVER

FEATURES · 3:21 Data Channel Compression at up to 1.428 Gigabits/s Throughput · Suited for Point-to-Point Subsystem Communication With Very Low EMI · 3 Data Channels and Clock Low-Voltage Differential Channels in and 21 Data and Clock Low-Voltage TTL Channels Out · Operates From a Single 3

文件：452.51 Kbytes 页数：22 Pages

TI

德州仪器

LVDS SERDES RECEIVER

文件：188.72 Kbytes 页数：14 Pages

TI

德州仪器

丝印：SN65LVDS96；Package：TSSOP；LVDS SERDES RECEIVER

FEATURES · 3:21 Data Channel Compression at up to 1.428 Gigabits/s Throughput · Suited for Point-to-Point Subsystem Communication With Very Low EMI · 3 Data Channels and Clock Low-Voltage Differential Channels in and 21 Data and Clock Low-Voltage TTL Channels Out · Operates From a Single 3

文件：452.1 Kbytes 页数：22 Pages

TI

德州仪器

LVDS SERDES RECEIVER

FEATURES · 3:21 Data Channel Compression at up to 1.428 Gigabits/s Throughput · Suited for Point-to-Point Subsystem Communication With Very Low EMI · 3 Data Channels and Clock Low-Voltage Differential Channels in and 21 Data and Clock Low-Voltage TTL Channels Out · Operates From a Single 3

文件：452.51 Kbytes 页数：22 Pages

TI

德州仪器

LVDS SERDES RECEIVER

FEATURES · 3:21 Data Channel Compression at up to 1.428 Gigabits/s Throughput · Suited for Point-to-Point Subsystem Communication With Very Low EMI · 3 Data Channels and Clock Low-Voltage Differential Channels in and 21 Data and Clock Low-Voltage TTL Channels Out · Operates From a Single 3

文件：452.51 Kbytes 页数：22 Pages

TI

德州仪器

丝印：SN65LVDS96；Package：TSSOP；LVDS SERDES RECEIVER

FEATURES · 3:21 Data Channel Compression at up to 1.428 Gigabits/s Throughput · Suited for Point-to-Point Subsystem Communication With Very Low EMI · 3 Data Channels and Clock Low-Voltage Differential Channels in and 21 Data and Clock Low-Voltage TTL Channels Out · Operates From a Single 3

文件：452.1 Kbytes 页数：22 Pages

TI

德州仪器

丝印：SN65LVDS96；Package：TSSOP；LVDS SERDES RECEIVER

FEATURES · 3:21 Data Channel Compression at up to 1.428 Gigabits/s Throughput · Suited for Point-to-Point Subsystem Communication With Very Low EMI · 3 Data Channels and Clock Low-Voltage Differential Channels in and 21 Data and Clock Low-Voltage TTL Channels Out · Operates From a Single 3

文件：452.1 Kbytes 页数：22 Pages

TI

德州仪器

LVDS SERDES RECEIVER

FEATURES · 3:21 Data Channel Compression at up to 1.428 Gigabits/s Throughput · Suited for Point-to-Point Subsystem Communication With Very Low EMI · 3 Data Channels and Clock Low-Voltage Differential Channels in and 21 Data and Clock Low-Voltage TTL Channels Out · Operates From a Single 3

文件：452.51 Kbytes 页数：22 Pages

TI

德州仪器

LVDS SERDES RECEIVER

FEATURES · 3:21 Data Channel Compression at up to 1.428 Gigabits/s Throughput · Suited for Point-to-Point Subsystem Communication With Very Low EMI · 3 Data Channels and Clock Low-Voltage Differential Channels in and 21 Data and Clock Low-Voltage TTL Channels Out · Operates From a Single 3

文件：452.51 Kbytes 页数：22 Pages

TI

德州仪器