SN65LVDS122PW.B中文资料德州仪器数据手册PDF规格书

FEATURES

· Designed for Signaling Rates (1) Up To

1.5 Gbps

· Total Jitter < 65 ps

· Pin-Compatible With SN65LVDS22 and

SN65LVDM22

· 25 mV of Receiver Input Threshold Hysteresis

Over 0-V to 4-V Common-Mode Range

· Inputs Electrically Compatible With CML,

LVPECL and LVDS Signal Levels

· Propagation Delay Times, 900 ps Maximum

· LVDT Integrates 110-W Terminating Resistor

· Offered in SOIC and TSSOP

APPLICATIONS

· 10-G (OC-192) Optical Modules

· 622-MHz Central Office Clock Distribution

· Wireless Basestations

· Low Jitter Clock Repeater/Multiplexer

· Protection Switching for Serial Backplanes

DESCRIPTION

The SN65LVDS122 and SN65LVDT122 are

crosspoint switches that use low voltage differential

signaling (LVDS) to achieve signaling rates as high

as 1.5 Gbps. They are pin-compatible speed up- grades to the SN65LVDS22 and SN65LVDM22. The

internal signal paths maintain differential signaling for

high speeds and low signal skews. These devices

have a 0-V to 4-V common-mode input range that

accepts LVDS, LVPECL, or CML inputs. Two logic

pins (S0 and S1) set the internal configuration between

the differential inputs and outputs. This allows

the flexibility to perform the following configurations:

2 x 2 crosspoint switch, 2:1 input multiplexer, 1:2

splitter or dual repeater/translator within a single

device. Additionally, SN65LVDT122 incorporates a

110-W termination resistor for those applications

where board space is a premium. Although these

devices are designed for 1.5 Gbps, some applications

at a 2-Gbps data rate can be supported depending on

loading and signal quality.

The intended application of this device is ideal for

loopback switching for diagnostic routines, fanout

buffering of clock/data distribution provide protection

in fault-tolerant systems, clock multiplexing in optical

modules, and for overall signal boosting over

extended distances.

The SN65LVDS122 and SN65LVDT122 are

characterized for operation from –40°C to 85°C.