SN65LVDx10x Differential Translator/Repeater

1 Features 1• Designed for Signaling Rates ≥ 2 Gbps • Total Jitter

文件：1.29524 Mbytes 页数：46 Pages

TI

德州仪器

DIFFERENTIAL TRANSLATOR/REPEATER

文件：1.06241 Mbytes 页数：25 Pages

TI

德州仪器

DIFFERENTIAL TRANSLATOR/REPEATER

文件：1.06241 Mbytes 页数：25 Pages

TI

德州仪器

DIFFERENTIAL TRANSLATOR/REPEATER

文件：679.64 Kbytes 页数：20 Pages

TI

德州仪器

2Gbps LVDS、LVPECL 和 CML 转 LVDS 缓冲器、中继器和转换器

The SN65LVDS100, SN65LVDT100, SN65LVDS101, and SN65LVDT101 are high-speed differential receivers and drivers connected as repeaters. The receiver accepts low-voltage differential signaling (LVDS), positive-emitter-coupled logic (PECL), or current-mode logic (CML) input signals at rates up to 2 Gbps • Designed for Signaling Rates ≥ 2 Gbps\n• Total Jitter Over 0-V to 4-V Input Voltage Range\n• Inputs Electrically Compatible With LVPECL, CML, and LVDS Signal Levels\n• 3.3-V Supply Operation\n• LVDT Integrates 110-Ω Terminating Resistor\n• Offered in SOIC and MSOP;

TI

德州仪器

丝印：DL100；Package：SOIC(D)；SN65LVDx10x Differential Translator/Repeater

1 Features 1• Designed for Signaling Rates ≥ 2 Gbps • Total Jitter

文件：1.29524 Mbytes 页数：46 Pages

TI

德州仪器

丝印：DL100；Package：SOIC(D)；SN65LVDx10x Differential Translator/Repeater

1 Features 1• Designed for Signaling Rates ≥ 2 Gbps • Total Jitter

文件：1.29524 Mbytes 页数：46 Pages

TI

德州仪器

丝印：DL100；Package：SOIC(D)；SN65LVDx10x Differential Translator/Repeater

1 Features 1• Designed for Signaling Rates ≥ 2 Gbps • Total Jitter

文件：1.29524 Mbytes 页数：46 Pages

TI

德州仪器

丝印：AZK；Package：VSSOP(DGK)；SN65LVDx10x Differential Translator/Repeater

1 Features 1• Designed for Signaling Rates ≥ 2 Gbps • Total Jitter

文件：1.29524 Mbytes 页数：46 Pages

TI

德州仪器

丝印：AZK；Package：VSSOP(DGK)；SN65LVDx10x Differential Translator/Repeater

1 Features 1• Designed for Signaling Rates ≥ 2 Gbps • Total Jitter

文件：1.29524 Mbytes 页数：46 Pages

TI

德州仪器