SN65LVDM176中文资料半双工 LVDM 收发器数据手册TI规格书

描述 Description

The SN65LVDM176 is a differential line driver and receiver configured as a transceiver that uses low-voltage differential signaling (LVDS) to achieve signaling rates as high as 400 Mbit/s. These circuits are similar to TIA/EIA-644 standard compliant devices (SN65LVDS) counterparts except that the output current of the drivers is doubled. This modification provides a minimum differential output voltage magnitude of 247 mV into a 50- load and allows double-terminated lines and half-duplex operation. The receivers detect a voltage difference of less than 50 mV with up to 1 V of ground potential difference between a transmitter and receiver. The intended application of this device and signaling technique is for half-duplex or multiplex baseband data transmission over controlled impedance media of approximately 100- characteristic impedance. The transmission media may be printed-circuit board traces, backplanes, or cables. (Note: The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media, the noise coupling to the environment, and other application specific characteristics). The SN65LVDM176 is characterized for operation from \\x9640°C to 85°C.

特性 Features

• Low-Voltage Differential Driver and Receiver for Half-Duplex Operation
• ESD Protection Exceeds 15 kV on Bus Pins
• Low-Voltage Differential Signaling With Typical Output Voltages of 350 mV and a 50- Load
• Propagation Delay Times
• Receiver: 3.7 ns Typ
• Receiver: 60 mW Typical
• Bus Pins Are High Impedance When Disabled or With VCC Less Than 1.5 V
• Surface-Mount Packaging
• DGK Package (MSOP)
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