SN65LVCP1414RLJT集成电路（IC）的信号缓冲器、中继器、分离器规格书PDF中文资料

SN65LVCP1414RLJT属于集成电路（IC）的信号缓冲器、中继器、分离器。由德州仪器制造生产的SN65LVCP1414RLJT信号缓冲器、中继器、分离器信号缓冲器、中继器和分离器系列中的产品适用于远距离电气互连或电缆系统的数字信息传输。所有实际互连系统都具有非理想特性，该系列产品主要用于解决数字信息传输过程中因此造成的模拟问题。此外，还有其他功能，例如不同物理接口样式之间的转换和多路复用。

1FEATURES

• Quad Channel, Uni-Directional, Multi-Rate, protocolDual-

Mode Linear Equalizer with Operation up

to 14.2Gbps Serial Data Rate for Backplane

and Cable Interconnects

• Linear Equalization Increases Link Margin for

Systems Implementing Decision Feedback

Equalizers (DFE)

• 17dB Analog Equalization at 7.1GHz with 1dB

Step Control for Backplane Mode or Cable

Mode

• Output Linear Dynamic Range: 1200mV

• Bandwidth: >20GHz – Typical

• Better than 15dB Return Loss at 7.1GHz

• Supports Out-of-Band (OOB) Signaling

• Low Power, Typically 80mW per Channel at

2.5V VCC

• 38-Terminal QFN (Quad Flatpack, No-Lead) 5

mm x 7 mm x 0.75 mm, 0.5 mm Terminal Pitch

• Excellent Impedance Matching to 100Ω

Differential PCB Transmission Lines

• GPIO or I2C Control

• 2.5V and 3.3V±5% Single Power Supply

• 2kV ESD (HBM)

• Flow-Through Pin-Out Provides Ease of

Routing

• Small Package Size Saves Board Space

• Low Power

APPLICATIONS

• High Speed Links in Telecommunication and

Data Communication

• Backplane and Cable Interconnects for 10GbE,

16GFC,10G SONET, SAS, SATA, CPRI, OBSAI,

Infiniband, 10GBase-KR, and XFI/SFI

DESCRIPTION

The SN65LVCP1414 is an asynchronous, protocolDual-

agnostic, low latency, four-channel linear equalizer

optimized for use up to 14.2Gbps and compensates

for losses in backplane or active cable applications. The architecture of the SN65LVCP1414 is designed

to work with an ASIC or FPGA with digital

equalization employing Decision Feedback Equalizers

(DFE). The SN65LVCP1414 linear equalizer

preserves the shape of the transmitted signal

ensuring optimum DFE performance. The

SN65LVCP1414 provides a low power solution while at the same time extending the effectiveness of DFE.

The SN65LVCP1414 is configurable via I2C or GPIO interface. Using the I2C interface of the

SN65LVCP1414 enables the user to control

independently the Equalization, Path Gain, and

Output Dynamic Range for each individual channel. In GPIO mode, Equalization, Path Gain, and Output

Dynamic Range can be set for all channels using the

GPIO Input pins.

The SN65LVCP1414 outputs can be disabled

independently via I2C.

The SN65LVCP1414 operates from a single 2.5V or

3.3V power supply.

The package for the SN65LVCP1414 is a 38 pin 5-

mm x 7-mm x 0.75-mm QFN (Quad Flat-pack No-

lead) lead-free package with 0.5mm pitch and is

characterized for operation from –40°C to 85°C.