SN65EPT23DSLASHDR中文资料德州仪器数据手册PDF规格书

1FEATURES

• Dual 3.3 V Differential LVPECL/LVDS to

LVTTL/LVCMOS Buffer Translator

• 24 mA LVTTL Ouputs

• Operating Range

– VCC = 3.0 V to 3.6 V

– GND = 0 V

• Support for Clock Frequencies > 300 MHz

• 2.0 ns Typical Propagation Delay

• Built-in Temperature Compensation

• Drop in Compatible to MC100EPT23

APPLICATIONS

• Data and Clock Transmission Over Backplane

• Signaling Level Conversion for Clock or Data

DESCRIPTION

The SN65EPT23 is a low power dual LVPECL/LVDS

to LVTTL/LVCMOS translator device. The device

includes circuitry to maintain inputs at Vcc/2 when left

open. The SN65EPT23 is housed in an industry

standard SOIC-8 package and is also available in

TSSOP-8 option.