丝印：SN65LV1023A；Package：VQFN(RHB)；10-MHz To 66-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER

FEATURES • 100-Mbps to 660-Mbps Serial LVDS Data Payload Bandwidth at 10-MHz to 66-MHz System Clock • Pin-Compatible Superset of DS92LV1023/DS92LV1224 • Chipset (Serializer/Deserializer) Power Consumption

文件：1.30397 Mbytes 页数：35 Pages

TI

德州仪器

丝印：SN65LV1023A；Package：VQFN(RHB)；10-MHz To 66-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER

FEATURES • 100-Mbps to 660-Mbps Serial LVDS Data Payload Bandwidth at 10-MHz to 66-MHz System Clock • Pin-Compatible Superset of DS92LV1023/DS92LV1224 • Chipset (Serializer/Deserializer) Power Consumption

文件：1.30397 Mbytes 页数：35 Pages

TI

德州仪器

丝印：SN65LV1023A；Package：VQFN(RHB)；10-MHz To 66-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER

FEATURES • 100-Mbps to 660-Mbps Serial LVDS Data Payload Bandwidth at 10-MHz to 66-MHz System Clock • Pin-Compatible Superset of DS92LV1023/DS92LV1224 • Chipset (Serializer/Deserializer) Power Consumption

文件：1.30397 Mbytes 页数：35 Pages

TI

德州仪器

丝印：SN65LV1224B；Package：VQFN(RHB)；10-MHz To 66-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER

FEATURES • 100-Mbps to 660-Mbps Serial LVDS Data Payload Bandwidth at 10-MHz to 66-MHz System Clock • Pin-Compatible Superset of DS92LV1023/DS92LV1224 • Chipset (Serializer/Deserializer) Power Consumption

文件：1.30397 Mbytes 页数：35 Pages

TI

德州仪器

丝印：SN65LV1224B；Package：VQFN(RHB)；10-MHz To 66-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER

FEATURES • 100-Mbps to 660-Mbps Serial LVDS Data Payload Bandwidth at 10-MHz to 66-MHz System Clock • Pin-Compatible Superset of DS92LV1023/DS92LV1224 • Chipset (Serializer/Deserializer) Power Consumption

文件：1.30397 Mbytes 页数：35 Pages

TI

德州仪器

丝印：SN65LV1224B；Package：VQFN(RHB)；10-MHz To 66-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER

FEATURES • 100-Mbps to 660-Mbps Serial LVDS Data Payload Bandwidth at 10-MHz to 66-MHz System Clock • Pin-Compatible Superset of DS92LV1023/DS92LV1224 • Chipset (Serializer/Deserializer) Power Consumption

文件：1.30397 Mbytes 页数：35 Pages

TI

德州仪器

丝印：SN65LV1224B；Package：VQFN(RHB)；10-MHz To 66-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER

FEATURES • 100-Mbps to 660-Mbps Serial LVDS Data Payload Bandwidth at 10-MHz to 66-MHz System Clock • Pin-Compatible Superset of DS92LV1023/DS92LV1224 • Chipset (Serializer/Deserializer) Power Consumption

文件：1.30397 Mbytes 页数：35 Pages

TI

德州仪器

丝印：SN65LV1224B；Package：VQFN(RHB)；10-MHz To 66-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER

FEATURES • 100-Mbps to 660-Mbps Serial LVDS Data Payload Bandwidth at 10-MHz to 66-MHz System Clock • Pin-Compatible Superset of DS92LV1023/DS92LV1224 • Chipset (Serializer/Deserializer) Power Consumption

文件：1.30397 Mbytes 页数：35 Pages

TI

德州仪器

丝印：SN65LV1224B；Package：VQFN(RHB)；10-MHz To 66-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER

FEATURES • 100-Mbps to 660-Mbps Serial LVDS Data Payload Bandwidth at 10-MHz to 66-MHz System Clock • Pin-Compatible Superset of DS92LV1023/DS92LV1224 • Chipset (Serializer/Deserializer) Power Consumption

文件：1.30397 Mbytes 页数：35 Pages

TI

德州仪器

丝印：SN65LVCP114；Package：NFBGA；SN65LVCP114 14.2-Gbps Quad 1:2-2:1 Mux, Linear-Redriver With Signal Conditioning

1 Features 1• Quad 2:1 Mux and 1:2 Demux • Multi-Rate Operation up to 14.2 Gbps Serial Data Rate • Linear Receiver Equalization Which Increases Margin at System Level of Decision Feedback Equalizer • Bandwidth: 18 GHz, Typical • Per-Lane P/N Pair Inversion • Port or Single Lane Switching

文件：862.85 Kbytes 页数：39 Pages

TI

德州仪器