SN54LS323J.A中文资料德州仪器数据手册PDF规格书

Multiplexed Inputs/Outputs Provide

Improved Bit Density

Four Modes of Operation:

Hold (Store) ~~ Shift Left

Shift Right Load Data

Operates with Outputs Enabled or at High Z

3-State Outputs Drive Bus Lines Directly

Can Be Cascaded for N-Bit Word Lengths

Typical Power Dissipation . . . 176 mW

Exceptionally Stable Shift (Clock)

Frequoncy .. . 25 MHz

Applications:

Stacked or Push-Down Registers,

Buffer Storage. and

Accumulator Registers

SNB4LS299 and SN74L5299 Are Similar

But Have Direct Overriding Clear

description

These Low-Power Schottky eightbit universal registers feature multiplexed inguts/outputs to achisve full sight bit data

handling in » single 20-sin packege. Two function elect inputs and two oUTTCOMrol PUTS can be used to choose

the modes of operation listed in the function {sbla. Synchranaus peralel oading is sccompished by taking both

funcuom selec lines. SO and 1, high. This paces the threats Outputs n 3 high-impact, which permits data

thet is applied on the input/output lines o be clocked Ino the register. Reading out of 1 register can be accomplished

while the outputs are enabled in any mode. The clear function i synchronous, end a low lave 3t the clear input clears

he register on the next low-to-high transition of he clack.