SN54LS173J中文资料摩托罗拉数据手册PDF规格书

4-BIT D-TYPE REGISTERWITH 3-STATE OUTPUTS

The SN54/74LS173A is a high-speed 4-BitRegister featuring 3-state outputs foruse in bus-organized systems. The clock is fully edge-triggered allowingeither a load from the D inputs ora hold (retain register contents) dependingon the state of the Input Enable Lines (IE1, IE2). AHIGH on either Output Enable line (OE1, OE2) brings the output to a high impedance state without affecting the actual register contents. A HIGH on the Master Reset (MR)input resets the Register regardless of the state of theClock (CP), the Output Enable (OE1, OE2) or the Input Enable (IE1, IE2) lines.

• Fully Edge-Triggered

• 3-State Outputs

• Gated Input and Output Enables

• Input Clamp Diodes Limit High-Speed Termination Effects